Senior RTL Design Engineer - Cache Subsystem
SiFiveJob Title
Senior RTL Design Engineer - Cache Subsystem
Role Summary
Design and microarchitect high-performance cache subsystems for RISC‑V CPU cores. Work across architecture, RTL implementation, verification, and physical design teams to deliver cache IP that meets performance, area, and power targets.
Experience Level
Senior. Requires at least 3 years of relevant industry experience in high-performance, energy-efficient cache subsystem design.
Responsibilities
Primary responsibilities include microarchitecture, RTL design, verification planning, and collaboration with implementation and performance teams.
- Architect, design, and implement new cache subsystems and enhance existing cache IP.
- Develop microarchitecture specifications and maintain clear documentation.
- Perform initial sandbox verification and coordinate detailed verification test plans with verification teams.
- Collaborate with physical implementation teams to meet frequency, area, and power goals.
- Work with performance modeling teams to explore and optimize performance.
Requirements
Core technical requirements and preferred skills.
Must have- Proven cache subsystem development experience from architecture through tapeout.
- Expertise in multi-level coherent cache architectures.
- Experience with TileLink or similar interconnect protocols.
- Proficiency in RTL design using Verilog, SystemVerilog, or VHDL.
- Practical experience collaborating with verification and physical implementation teams.
- Strong attention to detail and effective teamwork skills.
- Knowledge of RISC‑V architecture.
- Experience with Scala and/or Chisel.
- Familiarity with UVM, formal verification, or other IP verification methodologies.
- Experience with at least one object-oriented or functional programming language.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline, or equivalent practical experience.
About the Company
Company: SiFive
Headquarters: San Mateo, California, United States
SiFive is a pioneering company in the RISC-V ecosystem, focused on transforming the future of computing by delivering high-performance, data-intensive RISC-V solutions. Their compute platforms empower leading technology firms to innovate across various markets, including AI, machine learning, and automotive sectors. SiFive is recognized for its commitment to ongoing innovation and fostering collaboration among talented teams, impacting lives by enabling advanced chip design.
