Senior RTL Design Engineer

Job Title

Senior RTL Design Engineer

Role Summary

Design and integrate digital IP blocks for memory-focused SoC products from microarchitecture through RTL, verification, and physical implementation. Collaborate with architecture, CAD/EDA, verification, and physical design teams to deliver production silicon and improve design methodology using AI-assisted flows.

Experience Level

Senior-level. The posting specifies 3–6 years of RTL design experience; the role expects prior RTL and SoC experience and the ability to lead technical work on complex designs.

Responsibilities

Primary duties include RTL design, integration, verification, and cross-team collaboration:

• Design digital IP blocks from microarchitecture to RTL and integrate them into system-level designs.
• Define and review module interfaces and system-level architecture.
• Demonstrate and apply AI-based tools and automation to accelerate RTL optimization, design-space exploration, testbench generation, coverage, and debug.
• Define semicustom methodology for memory design and contribute to semicustom SoC/ASIC flows.
• Drive full-chip integration activities: CDC, lint, synthesis, static timing analysis (STA), and power analysis.
• Collaborate with CAD, EDA, software, verification, architecture, and physical design/layout teams.
• Oversee layout-related activities including floor-planning, placement, and routing.
• Perform block-level and full-chip verification: functional, timing, power, and reliability analysis.
• Provide technical mentorship and participate in design and methodology reviews.

Requirements

Must-have technical skills and experience:

• Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies.
• Deep understanding of SoC design flows: lint, CDC, synthesis, STA, and power analysis.
• Fundamentals of CMOS circuit design, device physics, and memory operation.
• Experience working effectively with global, multi-functional teams.

Nice-to-have:

• Domain experience in DRAM (DDR5, LPDDR5, HBM) or NAND memory design.
• Experience with Spyglass and SoC/ASIC semicustom flows.
• Exposure to AI/ML-assisted design flows, agentic AI, or advanced automation.
• Strong communication, problem-solving, and collaboration skills.

Education Requirements

Master's degree in Electrical Engineering or Computer Engineering is specified. The posting associates 3–6 years of RTL design experience with this education level. No explicit statement about equivalent practical experience was provided.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.