Senior R and D Engineer

Job Title

Senior R&D Engineer

Role Summary

Senior engineer on the StarRC parasitic extraction team developing transistor- and interconnect-level extraction for advanced process nodes (3nm, 2nm and beyond). The role combines computational electromagnetics research, field-solver techniques, and production C++ software development to deliver accurate, high-capacity extraction for customer signoff.

Experience Level

Senior. The posting expects candidates with graduate-level technical training and professional EDA/CAD software experience (see Education Requirements for details).

Responsibilities

Primary responsibilities include research, implementation, and customer collaboration to ensure StarRC delivers accurate, scalable parasitic extraction.

• Research, design, and implement transistor-level extraction capabilities for FinFET and gate-all-around devices at advanced nodes (3nm, 2nm, and beyond).
• Develop parasitic models for interconnect capacitance, inductance, and resistance using pattern-matching and field-solver methods.
• Apply computational electromagnetics methods to solve complex extraction problems and improve model accuracy.
• Design efficient C++ algorithms and data structures that handle massive layout datasets while balancing accuracy and runtime.
• Integrate StarRC with layout, simulation, timing, and physical verification flows and collaborate across teams.
• Work directly with foundries and customers to reproduce and resolve extraction and signoff issues in CPUs, 3D ICs, and advanced packaging.

Requirements

Concise list of required and preferred technical skills (education items are listed under Education Requirements).

• Must-have: Strong background in computational electromagnetics and numerical methods (quasi-static or full-wave EM modeling; FEM, BEM, MoM).
• Must-have: Hands-on experience with transistor-level parasitic extraction or modeling.
• Must-have: Proficiency in C++ with demonstrated algorithm design and performance-oriented data structures.
• Must-have: Experience debugging numerical stability and scaling algorithms to real customer designs.
• Nice-to-have: Familiarity with field solver technology, transmission-line analysis, LVS/extraction/circuit simulation flows, or experience working directly with foundries.

Education Requirements

MS or PhD in Electrical Engineering, Computer Science, or Computer Engineering is specified. The posting also references 1+ years of relevant EDA or CAD software development experience. No alternative "equivalent experience" language or specific certifications were listed.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.