Job Title
Senior Product Development Engineer
Role Summary
Lead silicon bring-up and product development test activities for system-on-chip (SoC) programs, coordinating wafer- and package-level NPI, ATE bring-up, characterization, yield analysis, and failure analysis.
Work cross-functionally with design, test, quality, foundry, suppliers and customers to debug first silicon, define test strategy, and drive improvements that enable product qualification and production ramp.
Experience Level
Senior — typically requires 5+ years of relevant product development, test, or reliability engineering experience.
Responsibilities
Accountable for silicon and test readiness across wafer and package stages; act as the technical interface for ATE and test qualification.
- Lead wafer-level and package-level new product introduction (NPI) bring-up, first-silicon debug, characterization, and yield ramp.
- Define and execute silicon characterization plans covering scan, MBIST, IOBIST, functional tests and analog/mixed-signal features.
- Serve as primary technical interface between ATE teams and internal stakeholders to align on test strategy, DFT coverage, and engineering failure analysis.
- Analyze yield limiters and drive root-cause investigations at wafer and package levels, including ATE failure analysis.
- Characterize performance and power across process/voltage/temperature corners to meet competitive product targets.
- Lead cross-functional troubleshooting and implement corrective and preventive actions with design, foundry, quality, and suppliers.
- Influence test architecture and next-generation product requirements through collaboration with architecture and software teams.
Requirements
Key skills and experience required or strongly preferred.
-
Must-have: 5+ years of relevant experience in silicon bring-up, test engineering, or product development.
-
Must-have: Demonstrated analytical and problem-solving ability in troubleshooting test failures and optimizing test coverage.
-
Must-have: Experience porting functional workloads to automated test environments and understanding software–hardware dependencies.
-
Must-have: Experience with failure analysis and yield improvement activities at wafer and package levels.
-
Nice-to-have: Exposure to Teradyne and Advantest ATE platforms.
-
Nice-to-have: Experience with analog/mixed-signal test methodologies and MBIST/scan/IO test strategies.
Education Requirements
Bachelor's degree in Electrical Engineering is specified in the posting, with "or equivalent practical experience" accepted. The posting references 5+ years of relevant experience as part of the qualification.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

Date Posted: 2026-06-16