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Senior Principal Test Engineer

Marvell Technology
June 23, 2026
Full-time
On-site
Santa Clara, California, United States
$160,200 - $240,000 USD yearly
Test Engineering Jobs, Level - Senior

Job Title

Senior Principal Test Engineer

Role Summary

Lead the ATE test strategy and development for IO chiplet products within Operations. Serve as the primary technical authority for test methodologies, infrastructure, and execution to meet product performance, quality, and manufacturing scale requirements.

Expected base pay range: USD 160,200 - 240,000 per year.

Experience Level

Senior-level role. The posting requests over 12 years of semiconductor test engineering experience.

Responsibilities

Own ATE test solution development and cross-functional delivery for characterization, production, and wafer sort.

  • Define and drive ATE test strategy for IO chiplets, aligning cross-functional stakeholders.
  • Lead development of ATE test solutions on the Advantest 93K platform for characterization, wafer sort, and production.
  • Design and develop high-speed ATE hardware for data rates above 112 Gbps.
  • Create comprehensive test plans and methodologies to validate product specifications and performance.
  • Collaborate with DFx and design teams to review testability and improve yield and test coverage.
  • Translate design-level test content into ATE-ready test patterns and production programs.
  • Optimize test flows to reduce test time, remove redundant steps, and improve manufacturing yield.

Requirements

Key technical and leadership qualifications required for the role.

  • 12+ years of semiconductor test engineering experience including NPI, ATE development, silicon characterization, correlation, and high-volume manufacturing.
  • Proven technical leadership building high-speed and high-power semiconductor test solutions for AI, networking, or advanced compute products.
  • Deep expertise in ATE test methodologies, silicon process fundamentals, DFT/DFM, high-speed SerDes, and high-power ATE testing.
  • Demonstrated experience building scalable ATE architectures and reusable ATE IP for multi-chip modules and advanced packaging (MCM, CPC, CPO).
  • Strong hands-on experience with the Advantest 93K platform.
  • Proficient in Java, C/C++, Perl, Python, and Linux for test development and automation.
  • Excellent communication, collaboration, and problem-solving skills; effective in fast-moving engineering environments.
  • Self-driven, adaptable, and able to lead cross-functional engineering teams to production readiness.
  • Reasonable accommodation during the selection process: contact Marvell HR Helpdesk at TAOps@marvell.com.

Education Requirements

Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related discipline.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-06-18