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Senior Principal RF Design Engineer

Cadence Design Systems
August 04, 2026
Full-time
On-site
Austin, Texas, United States
ASIC Design Jobs, Level - Senior

Job Title

Senior Principal RF Design Engineer

Role Summary

Senior RF IC designer responsible for architecting and delivering millimeter-wave (30+ GHz) transceivers and RF building blocks for communications, radar, and sensing products. Work spans concept, schematic/layout, tape-out, and lab validation on advanced process nodes with close customer interaction.

Experience Level

Senior β€” typically 10+ years of industrial experience designing and validating high-frequency RF ICs.

Responsibilities

Core responsibilities include system-level RF design, hands-on circuit work, verification, and customer-facing technical support.

  • Define and execute design of mmWave Tx/Rx signal chains and phased-array subsystems.
  • Design custom RF blocks: power amplifiers (PAs), low-noise amplifiers (LNAs), mixers, VCOs, and supporting biasing/networks.
  • Architect and implement PLLs (including Sigma-Delta and Fractional-N), and associated building blocks (PFDs, charge pumps, dividers, multipliers).
  • Perform system and circuit-level analysis for noise, linearity, dynamic range, ACPR, EVM, BER and power efficiency.
  • Drive designs from schematic through layout, extraction, tape-out and final lab characterization.
  • Perform high-frequency EM and parasitic extraction, thermal analysis, and mitigate layout-related issues.
  • Lead lab validation: setup and run measurements with spectrum analyzers, VNAs, probe stations, and interpret results to close design loops.
  • Engage directly with customers to define requirements, present results, and iterate rapidly on designs.

Requirements

Must-have technical skills and experience; concise list of required and preferred qualifications.

  • Must-have: Deep experience with mmWave IC design (30+ GHz) and taking designs to tape-out and lab validation.
  • Must-have: Expertise in designing PAs, LNAs, mixers, VCOs and full Tx/Rx signal chains with attention to noise, linearity, and power.
  • Must-have: Strong PLL design experience including Sigma-Delta and Fractional-N PLL techniques and related building blocks.
  • Must-have: Extensive lab characterization skills using spectrum analyzers, VNAs, probe stations, and related test equipment.
  • Must-have: Proficiency with EDA and simulation tools such as Cadence Virtuoso/VRF, VSS, and EM simulators (EMX, Clarity); layout and verification tools (Layout MXL, QRC, Pegasus).
  • Preferred: Experience with RF SOI and advanced process trade-offs; phased-array architectures and system-level RF optimization.
  • Preferred: Strong background in high-frequency electromagnetic modeling, parasitic mitigation, and thermal management.

Education Requirements

Typically an M.Sc. or Ph.D. in Electrical Engineering or a closely related discipline. Equivalent practical experience in high-frequency RF IC design may be considered.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-04