Senior Principal IC Digital Flow Application Engineer
Cadence Design SystemsJob Title
Senior Principal IC Digital Flow Application Engineer
Role Summary
As a field applications engineer focused on digital implementation and signoff, you will work directly with customers and R&D to deploy synthesis, place-and-route, and signoff flows that meet performance, power, and area targets. The role combines hands-on technical support, flow development, and customer-facing engagements to drive tool adoption and product requirements.
We’re doing work that matters: you'll enable customers to achieve faster design closure and influence next-generation tools and methodologies.
Experience Level
Senior - typically requires 10+ years of industry physical design experience.
Responsibilities
Provide technical leadership and hands-on support for backend digital design implementation and signoff engagements.
- Support customers on place-and-route, design closure, and timing/power signoff.
- Advise customers on using tools and flows to achieve PPA targets and project schedules.
- Conduct technical presentations, demonstrations, evaluations, and benchmarks.
- Collaborate with R&D to drive tool and methodology improvements and capture product requirements.
- Develop and adapt flows and automation using Tcl/Perl/Python to meet engagement objectives.
- Document and propagate best practices and lessons learned to improve future engagements.
Requirements
Core technical skills and customer-facing capabilities required.
Must-have- Strong knowledge of digital design fundamentals, semiconductor concepts, and static timing analysis.
- Proven experience with backend IC digital implementation flows and EDA tools (place-and-route, IR drop, timing and power closure).
- Experience with advanced nodes (10nm and below).
- Proficient in scripting (Tcl, Perl, Python).
- Strong customer-facing communication, problem-solving, and collaboration skills.
- Experience with front-end tools: synthesis, DFT, logical equivalence checking.
- Familiarity with Cadence tools such as Genus, Innovus, Tempus, Voltus, Conformal, Modus, ICC/ICC2, DC, or PrimeTime.
- Experience with cutting-edge nodes (5nm and below).
Education Requirements
Minimum: Bachelor's degree (BS) in Computer Science, Computer Engineering, Electrical Engineering, or a related field. Preferred: Master's degree (MS) in the same fields.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
