Senior Principal Engineer, Physical Designer
Marvell TechnologyJob Title
Senior Principal Engineer, Physical Designer
Role Summary
As a senior leader in Marvell's central physical design team, you will lead RTL-to-GDSII implementation and shape long-term physical design methodology for high-performance processor and SoC designs. You will provide technical direction, drive methodology development and automation, and ensure timely tapeouts of complex SoCs.
Expected base pay range (USD): $177,820 - $266,400 per annum. This role is eligible for company bonus and equity programs.
Experience Level
Senior-level; typically requires 15+ years of relevant experience in physical design, including significant leadership and tapeout ownership.
Responsibilities
The role leads physical implementation and team direction. Key responsibilities include:
- Define and drive long-term physical design vision, methodologies, and infrastructure.
- Lead RTL-to-GDSII implementation across multiple SoC programs: synthesis, floorplanning, power grid design, place-and-route, CTS, timing closure, power/signal integrity signoff, and physical verification.
- Provide technical leadership and strategic direction to physical design teams to achieve tapeout goals.
- Mentor engineering staff and manage team hiring, performance, and career development.
- Coordinate cross-functional collaboration with design teams and stakeholders to influence architecture and design decisions.
- Resolve cross-functional issues and maintain project momentum.
- Develop and deploy automation and next-generation physical design flows and tooling, including adoption of AI/ML-driven optimizations where applicable.
Requirements
Must-have technical skills and experience:
- Extensive experience in back-end physical design and verification with proven leadership of complex SoC projects.
- Deep expertise in hierarchical physical design strategies and advanced process node challenges.
- Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure.
- Proficiency with modern EDA tools and flows; experience with static timing analysis (e.g., PrimeTime, Tempus) is expected.
- Experience with power/EM/IR analysis and extraction, and physical verification tools is desirable.
- Proficient in automation and scripting (Tcl, Python, Perl, Makefile) to improve flow robustness and productivity.
- Proven communication, cross-functional collaboration, and people-management skills.
Education Requirements
Bachelor's degree in Computer Science, Electrical Engineering, or a related field with 15+ years of experience; or Master's degree in Computer Science, Electrical Engineering, or related field with 10–12 years; or PhD in Computer Science, Electrical Engineering, or related field with 8–10 years; or equivalent professional experience in lieu of a formal degree.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
