Senior Principal Engineer, Architecture ASIC / System

Job Title

Senior Principal Engineer, Architecture ASIC / System

Role Summary

Senior architect responsible for SoC and system-level architecture for processor-based datacenter, CXL memory, near-memory compute, AI memory and DPU products. The team defines product requirements, block microarchitecture, and coordinates IP and cross-functional tradeoffs.

This role leads technical direction, customer engagement, and mentoring of architects and engineers on complex silicon projects.

Experience Level

Senior-level. Minimum practical expectation: at least 8+ years in system/SoC architecture; see Education Requirements for degree-specific experience guidance.

Responsibilities

Primary responsibilities include defining and driving SoC architecture and coordinating cross-functional execution.

• Lead chip and SoC architecture, engaging with customers, engineering, and marketing.
• Specify product requirements and drive requirements to closure.
• Architect new blocks and system capabilities; define microarchitecture and interfaces.
• Oversee IP evaluation, block microarchitecture, pinouts, and integration tradeoffs.
• Estimate and balance cost, power, and performance targets.
• Coordinate with other business units on internal IP reuse and capability sharing.
• Provide technical leadership, training, and mentorship to architects and engineers.

Requirements

Core technical and leadership qualifications required for the role.

• Extensive experience (minimum ~8+ years) in system architecture development and delivering complex silicon solutions.
• Demonstrated expertise in SoC architecture areas: interconnects, I/O technologies, virtualization, memory hierarchies, clocks/resets, power management, and security.
• Experience with IP evaluation, block microarchitecture, pinout definition, and system integration tradeoffs.
• Proven technical leadership and project delivery on complex chip programs.
• Strong communication skills for customer interaction and cross-team coordination.
• Experience mentoring and developing other architects/engineers.
• Nice-to-have: experience with datacenter server SoCs, CXL memory/near-memory compute, AI memory systems, or DPUs.
• Willingness to consider relocation; alternate locations may be considered.

Education Requirements

Degree and experience options listed by employer: Bachelor's degree in Computer Science, Electrical Engineering or related field with 14+ years' related experience; or Master's degree in Computer Science, Electrical Engineering or related field with 10+ years' experience; or PhD in Computer Science, Electrical Engineering or related field with 8+ years' experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.