Senior Principal Digital SoC Architect

Job Title

Senior Principal Digital SoC Architect

Role Summary

Define microarchitecture, technical specifications, and execution strategy for next-generation mixed-signal SoCs targeted at automotive (EV, ADAS, autonomous) and AI/data-center markets. Lead high-level architecture decisions, platform roadmaps, and global cross-functional execution to deliver silicon that meets performance, power, safety, and security requirements.

This is a senior technical leadership role responsible for mentoring engineering teams and aligning product, design, verification, and software teams. Applicants must reside in New Hampshire, Massachusetts, Texas, or Michigan.

Experience Level

Senior-level. Typically requires 12+ years in semiconductor digital design with at least 5 years as a lead SoC architect.

Responsibilities

Own top-level SoC architecture, drive IP strategy, and coordinate cross-functional delivery.

• Lead architectural definition and technical specifications (CPU/DSP subsystems, bus fabrics, memory maps, power management schemes, digital/analog interfaces).
• Define and champion the digital IP roadmap and drive global IP reuse to improve quality and reduce time-to-market.
• Develop architectural and transaction-level models to validate performance, latency, and power budgets early in the design cycle.
• Serve as primary technical bridge between Product Marketing, Analog Design, Digital Design, Physical Design, Verification (DV/MSDV), and Software/Systems teams.
• Architect safety-critical features for automotive functional safety (ISO 26262 up to ASIL D) and implement security protocols (Evita/HSM).
• Partner with Technology Development to select process nodes and packaging technologies to meet cost, thermal, and performance goals.

Requirements

Core technical skills and proven leadership required. Education expectations are listed below.

• Must-have:
  • 12+ years in semiconductor digital design with 5+ years acting as a lead SoC architect.
  • Experience integrating embedded processors (ARM Cortex-M/R, RISC-V), NoC interconnects, and memory subsystems (SRAM, Flash, NVM).
  • Expertise with automotive and industrial interfaces/protocols (CAN-FD, LIN, SPI, I2C, I3C, Ethernet, SENT).
  • In-depth knowledge of ISO 26262 architectures, lockstep cores, ECC, BIST/LBIST, and safety diagnostics.
  • Expertise in multi-voltage domains, power gating, DVFS, and UPF-driven verification.
  • High proficiency in system modeling (SystemC, MATLAB/Simulink) and digital front-end design tools (Verilog, SystemVerilog).
  • Proven mentorship experience and ability to build consensus across matrixed, global teams; strong communication skills.
• Nice-to-have:
  • Direct experience with smart motor control, BLDC algorithms, or advanced magnetic sensing systems.
  • Experience with hardware security modules (HSM) and cryptographic accelerators.
  • Experience with mixed-signal design flows (MSDV) and top-level chip integration.

Education Requirements

B.S. or M.S. in Electrical or Computer Engineering; Ph.D. preferred.

About the Company

Company: Allegro MicroSystems

Headquarters: Manchester, New Hampshire, USA

Global semiconductor company with over 30 years of innovation, developing semiconductor devices and design enablement tools. Allegro focuses on device development, foundry partnerships, IP characterization, and design automation to support product roadmaps and technology advancement.