Senior Principal Design Verification Engineer - FPGA (Sign-on Bonus)

Job Title

Senior Principal Design Verification Engineer - FPGA (Sign-on Bonus)

Role Summary

Lead design verification efforts for FPGA-based signal processing and control functions used in Electronic Warfare systems. Plan and architect verification environments, lead small-to-medium DV teams, and improve verification processes and reusable IP across multiple U.S. sites.

Experience Level

Senior. The posting indicates senior/principal level responsibility and leadership; candidate should have substantial industry experience.

Responsibilities

Primary responsibilities include designing verification environments, executing verification plans, and mentoring others.

• Plan, architect, develop, and use configurable, self-checking testbenches implemented in SystemVerilog, UVM and/or VHDL.
• Develop constrained-random, metric-driven test plans and strategies for FPGA verification.
• Collect and analyze coverage metrics and use results to improve testcases and verification completeness.
• Create reusable Verification IP to be shared across the organization.
• Lead and mentor junior engineers and lead small to medium verification teams across multiple U.S. locations.
• Drive process and methodology improvements for verification activities.

Requirements

Must-have technical skills, clearance, and experience required by the role. Preferred skills are listed separately.

Must-have

• 8+ years relevant work experience (experience requirement summarized under Education Requirements).
• Ability to obtain and maintain a U.S. Secret security clearance; U.S. citizenship/U.S. person status required.
• Experience planning, architecting, developing, and using constrained-random, self-checking testbenches in SystemVerilog, UVM, OVM, and/or VHDL.
• Experience with FPGA/ASIC design and verification tools (e.g., Mentor Questa or Cadence).
• Proven ability to manage schedules, drive tasks to closure, and support multiple projects concurrently.
• Strong written and verbal communication and documentation skills; ability to work in a multi-site environment.

Nice-to-have

• Perl or Python scripting.
• C++ or Java programming experience.
• Experience with Git, Jira, Bitbucket.
• Digital Signal Processing and MATLAB/Simulink experience.
• Working knowledge of VHDL and FPGA design experience.
• Experience creating reusable Verification IP and driving process improvements.
• Prior leadership experience with accountability for cost, schedule, and quality.

Education Requirements

Bachelor's degree and 8+ years of relevant work experience, or equivalent practical experience.

About the Company

Company: BAE Systems

Headquarters: London, United Kingdom

Global defense, aerospace and security company delivering products and services for air, land and naval forces, advanced electronics, cyber and intelligence solutions, and space and mission systems for government and commercial customers.