Senior Principal Design Verification Engineer

Job Title

Senior Principal Design Verification Engineer

Role Summary

Lead design verification for ultra-dense and high-performance SRAM memory compilers within Marvell's Central Engineering group. Work across IP, Subsystem, and SoC teams to define verification strategy, testbench architecture, and achieve sign-off.

Experience Level

Senior — requires 18+ years of relevant design verification experience.

Responsibilities

Primary responsibilities include:

• Define and drive improvements in design verification (DV) processes for consistent, high-quality execution.
• Lead end-to-end Subsystem DV execution and sign-off, coordinating milestones and reviews.
• Architect and implement simulation testbenches using UVM and C; develop BFMs, monitors, and scoreboards.
• Create and execute test plans to verify design correctness and performance across IP and subsystem levels.
• Collaborate with IP, Subsystem, and SoC teams on test plan creation, coverage closure, and gate-level simulations.
• Own and debug simulation failures to identify and resolve root causes; support post-silicon bring-up with firmware and silicon teams.
• Coordinate cross-functionally with Architecture, Chip Lead, Emulation, and Program Management to drive DV execution.

Requirements

Must-have technical skills and experience:

• 18+ years leading design verification at Subsystem level with proven delivery of core technical projects.
• Strong experience coding UVM subsystem/block-level testbenches, including BFMs, scoreboards, and monitors.
• Proficient writing and debugging tests in UVM and C.
• Good knowledge of ARM architecture and AMBA bus standards (AXI-4, CHI, ACE).
• Experience with industry-standard interfaces such as DDR, HBM, PCIe, Ethernet, and USB.
• Proficient with verification tool flows from Cadence, Synopsys, Mentor and/or ARM verification tools.
• Familiarity with hardware emulation support and usage of version control tools (GIT, SVN).
• Proficient in scripting (tcl, Perl) for DV automation and debug.

Nice-to-have:

• Experience with assertion-based formal verification tools.

Education Requirements

Master's or Bachelor's degree is specified. The posting states 18+ years of relevant experience. A specific field of study is not listed.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.