Senior/Principal Analog & Mixed Signal Design Engineers

Job Title

Senior/Principal Analog & Mixed Signal Design Engineers

Role Summary

Design and deliver high-performance analog and mixed-signal IP (transmit drivers, TIAs, clocking, biasing, on-chip regulation) across BiCMOS and advanced CMOS nodes. This role owns analog building blocks from architecture through silicon validation in a technically rigorous environment.

Collaborate closely with digital, layout, and validation teams to produce scalable, manufacturable analog IP and support silicon bring-up and characterization.

Experience Level

Senior / Principal — 7+ years of hands-on analog or mixed-signal IC design experience.

Responsibilities

Deliver transistor-level analog IP and support silicon validation.

• Architect and design high-speed analog and mixed-signal circuits (transmit drivers, PAM-based drivers, TIAs, receiver front-ends).
• Design clocking and timing circuits (PLLs, DLLs, low-jitter references) and biasing networks, bandgaps, and on-chip power regulation.
• Perform transistor-level design, simulation, and optimization across PVT corners.
• Analyze and optimize bandwidth, noise, linearity, jitter, stability, and power.
• Work closely with layout engineers on floorplanning, matching, isolation, and parasitic management.
• Define and support silicon bring-up, characterization, debug, and correlation to simulation.
• Contribute to design methodology, IP reuse, and best practices across programs.

Requirements

Core must-have skills and practical experience; preferred items follow.

Must-have:

• 7+ years of hands-on analog or mixed-signal IC design experience.
• Proven experience taking drivers, TIAs, or related analog blocks through tape-out and lab validation.
• Strong fundamentals in feedback and stability analysis, noise and jitter modeling, high-speed analog circuit design, and power integrity/substrate isolation.
• Proficiency with industry-standard analog design and circuit simulation tools.
• Experience with transistor-level simulation and optimization across process, voltage, and temperature corners.

Nice-to-have:

• Experience with BiCMOS (SiGe) and/or advanced CMOS nodes.
• Background in high-speed data-path or I/O-adjacent analog circuits, process scaling, silicon debug, failure analysis, and yield learning.

Education Requirements

MS or PhD in Electrical Engineering or a related field.

About the Company

Company: Lumilens

Headquarters: San Jose, CA, USA

Lumilens develops integrated photonics and optical interconnect solutions for high-speed data communication and chip-to-chip interfaces, focusing on optical front-end hardware and co-packaged optics for advanced semiconductor systems.