Senior Post-Silicon PCIe Characterization Engineer

Job Title

Senior Post-Silicon PCIe Characterization Engineer

Role Summary

Validate and characterize PCIe interfaces on Arm SoCs during post-silicon bring-up. Work on the Chandler Characterization team to run system-level tests, analyze results, and collaborate with cross-functional engineering teams to debug and improve silicon performance across process, voltage, temperature, and frequency conditions.

Experience Level

Senior. No explicit years-of-experience requirement provided.

Responsibilities

Deliver system-level characterization and debug for PCIe and related interfaces on silicon devices.

• Develop and run system-level stress workloads on Linux and bare-metal environments.
• Characterize silicon across process, voltage, temperature, and frequency (PVT/F) conditions.
• Collaborate with post-silicon validation and engineering teams to reuse test content for characterization.
• Analyze data, identify root causes, and debug system and PCIe-related issues using protocol analyzers, scopes, and debuggers.
• Create test plans and implement tests for system-level silicon characterization and margining.
• Report technical findings and recommend changes to improve silicon stability and performance.

Requirements

Must-have technical skills and experience required for the role.

• Experience in pre- or post-silicon validation and characterization, including silicon power, performance, and PVT behavior.
• Hands-on experience with PCIe architecture: link initialization, training, equalization, and PHY operation.
• Proficiency in software and scripting: C/C++, Arm assembly, Python or similar scripting languages.
• Experience with voltage/frequency margining and defining silicon operating limits.
• Experience debugging PCIe, silicon, and system issues using protocol analyzers, oscilloscopes, debuggers, or equivalent tools.
• Strong data analysis skills and clear technical communication.

Nice-to-have:

• Experience with PCIe PHY characterization, signal integrity, and protocol-level debug (Gen4/Gen5/Gen6 or similar high-speed interfaces).
• Experience characterizing PCIe performance, stability, operating margins, and failure modes.
• Experience with PCIe protocol analysis, error handling, link recovery, or compliance testing.
• Experience developing Python automation for characterization and data analysis.
• Prior experience with Arm-based SoCs, CPUs, PCIe controllers, or system-level test correlation with manufacturing test.

Education Requirements

Not specified.

About the Company

Company: Arm

Headquarters: Cambridge, United Kingdom

ARM is a global leader in semiconductor and software design, driving innovation in computing technology. The company specializes in designing processors and systems that provide the essential building blocks for electronic devices. ARM's architecture is widely used in smartphones, servers, and IoT devices, and its collaborative culture fosters bold thinking, diversity, and high-impact benefits for its talented workforce.