Senior Physical Design Engineer - Custom Silicon Group
QualcommJob Title
Senior Physical Design Engineer - Custom Silicon Group
Role Summary
Design and deliver physical implementation for complex SoC subsystems from netlist to GDS, focusing on Power, Performance, and Area (PPA). Work within the Custom Silicon Group in Bangalore and collaborate with circuit, RTL, verification, and integration teams to achieve sign-off-ready layouts.
Experience Level
Senior role. Minimum experience guidance in posting: Bachelor's +6 years relevant hardware engineering experience, Master's +5 years, or PhD +4 years. The posting also highlights at least 3 years of physical design experience from product-based companies.
Responsibilities
Key responsibilities include owning physical design tasks for complex subsystems and driving PPA targets.
- Lead Netlist-to-GDS physical implementation: floorplan, place-and-route, and sign-off convergence.
- Perform static timing analysis (STA) and implement sign-off optimizations.
- Implement low-power techniques (UPF, multi-voltage domains, power gating) and validate power intent.
- Integrate third-party and internal IP into subsystems and ensure PPA compliance.
- Drive automation and flow improvements to improve turnaround and PPA.
- Work across multiple technology nodes and advanced process nodes; resolve device- and process-related issues.
- Coordinate with cross-functional teams and manage small teams or project-level resources to meet schedules and targets.
Requirements
Must-have technical skills and experience.
- Proven experience managing complex subsystems and small teams for physical design projects.
- Strong hands-on proficiency in PnR flows and sign-off methodologies, including STA and convergence.
- Practical experience with advanced and lower technology nodes.
- Expertise in meeting demanding PPA targets for SoCs and subsystems.
- Experience with low-power implementation techniques and power intent flows (UPF, power gating, multi-voltage).
- Familiarity with ASIC design flows, physical design methodologies, and IP integration.
- Good understanding of circuit design, device physics, and deep sub-micron technology implications on physical design.
- Experience developing or applying automation to improve PPA and design turnaround.
Education Requirements
Posting specifies a Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field. Minimum experience guidance tied to degree: Bachelor's +6 years, Master's +5 years, PhD +4 years of hardware engineering or related work experience. The posting also notes a preference for candidates from top-tier institutes.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
