Senior Physical Design Engineer, Annapurna Labs

Job Title

Senior Physical Design Engineer, Annapurna Labs

Role Summary

Design and optimize physical implementations of custom SoCs used in AWS machine learning servers (inference and training). You will work on RTL-to-GDSII physical design closure, methodology development, and cross-functional integration with RTL, architecture, and IP teams.

Experience Level

Senior. Experience guidance: BS + 8 years or MS + 6 years in Electrical Engineering or Computer Science, and 6+ years of ASIC physical design experience.

Responsibilities

Primary responsibilities for this role include delivering physical implementation for blocks and subsystems, improving physical design flow, and collaborating with architecture and RTL teams.

• Drive architectural feasibility studies and evaluate power-performance-area trade-offs for physical closure.
• Lead physical implementation for IO/core subsystems and blocks: synthesis, floorplanning, pin planning, place & route, ECO and sign-off.
• Perform power/clock distribution planning, congestion analysis, timing closure, IR drop analysis, and physical verification.
• Develop and improve physical design methodologies and physical design flows.
• Evaluate and integrate 3rd-party IP; specify physical-domain IP requirements and drive their delivery.
• Collaborate closely with RTL, architecture, and other physical design engineers; mentor junior engineers.

Requirements

Must-have technical skills and domain experience; preferred items listed separately.

• Proficient scripting skills (Python, Perl, Bash, or PowerShell).
• 6+ years of hands-on ASIC physical design experience (RTL-to-GDSII) across advanced nodes (examples: 7nm, 14/16nm, 20nm, 28nm).
• Practical experience with EDA tool flows (Cadence, Synopsys, Mentor or similar) covering synthesis, equivalency verification, floorplanning, pin/bus planning, place & route, and ECO.
• Strong experience in power/clock distribution, congestion analysis, timing closure, IR drop analysis, and physical verification leading to sign-off.
• Experience analyzing QOR metrics and performing design-parameter extraction.
• Excellent collaboration skills to work with RTL, architecture, IP, and verification teams.

Preferred:

• Experience mentoring, leading, or managing junior engineers.
• Expertise developing CAD tool flows for synthesis, floorplanning, P&G distribution, timing closure, IR drop, and verification.
• 4+ years integrating IP and driving IP requirements in the physical domain.
• Knowledge of device physics and custom/semi-custom implementation techniques.
• Experience with interfaces and subsystems such as DDR, PCIe, and fabrics.

Education Requirements

Bachelor's (BS) in Electrical Engineering or Computer Science with ~8 years' experience, or Master's (MS) in Electrical Engineering or Computer Science with ~6 years' experience. (This education and years-of-experience guidance appears in the role's minimum qualifications.)

About the Company

Company: Amazon Web Services

Headquarters: Seattle, Washington, USA

Amazon Web Services (AWS) provides a comprehensive and evolving cloud computing platform that includes infrastructure as a service (IaaS), platform as a service (PaaS), and software as a service (SaaS). AWS allows business and developers to use a wide range of cloud services for computing power, storage, and content delivery, among others, thus fostering innovation and enabling faster deployment of applications. AWS is designed to be scalable, flexible, and cost-effective across industries worldwide.