Senior Physical Design Engineer, Annapurna Labs (AWS)

Job Title

Senior Physical Design Engineer, Annapurna Labs (AWS)

Role Summary

Annapurna Labs designs custom SoCs and software used in AWS machine learning servers. This role on the Cloud-Scale Machine Learning Acceleration team is responsible for physical implementation and optimization of datacenter ASICs (for example, Inferentia and Trainium) to meet power, performance, area, and schedule targets.

Experience Level

Senior — typically 6+ years of ASIC physical design experience (RTL-to-GDSII); experience across advanced process nodes (7nm–28nm) preferred.

Responsibilities

Key responsibilities include:

• Collaborate with RTL/architecture teams to assess feasibility and evaluate power-performance-area trade-offs.
• Drive IO/core subsystem and block physical implementation: synthesis, floorplanning, bus/pin planning, place & route, and sign-off.
• Perform power and clock distribution design, congestion analysis, timing closure, IR drop/IR/EM analysis, physical verification, ECOs, and sign-off activities.
• Develop and improve physical design methodologies and automation flows.
• Evaluate and integrate 3rd-party IP; specify and drive IP physical requirements.
• Work collaboratively and mentor junior engineers to deliver high-quality ASICs at datacenter scale.

Requirements

Must-have skills and experience:

• 6+ years of hands-on ASIC physical design experience (RTL-to-GDSII) including block design and sign-off activities.
• Practical experience with EDA flows and tools for synthesis, equivalency verification, floor planning, pin/bus planning, place & route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECO.
• Scripting proficiency in Python, Perl, Bash, or PowerShell.
• Experience using CAD tools from vendors such as Cadence, Mentor Graphics, Synopsys, or equivalent.
• Strong collaboration, problem-solving, and communication skills in cross-functional teams.

Nice-to-have:

• Experience mentoring, leading, or managing junior engineers.
• Experience integrating IP (4+ years) and specifying IP requirements in the physical domain.
• Thorough knowledge of device physics, custom/semi-custom implementation techniques, and interfaces such as DDR, PCIe, and fabrics.
• Experience extracting design parameters, quality-of-result metrics, and analyzing trends.

Education Requirements

BS + 8 years or MS + 6 years in Electrical Engineering, Computer Science, or a related technical field (as stated in the posting).

About the Company

Company: KGS

KGS is a government and commercial contracting firm that provides engineering, technical, and staffing solutions, often supporting aerospace, defense, and IT projects for federal and industry customers.