Senior Physical Design Engineer
Baya SystemsJob Title
Senior Physical Design Engineer
Role Summary
Senior Physical Design Engineer responsible for RTL-to-GDS physical implementation and methodology development for high-performance and low-power SoC and multi-die designs. The role partners closely with micro-architects and system designers to make trade-offs and deliver production-quality physical designs.
Experience Level
Senior - typically 7+ years of relevant physical design and implementation experience.
Responsibilities
Primary responsibilities include:
- Own RTL-to-GDS physical implementation flows: synthesis, floorplanning, place & route, CTS, timing and power closure, EM/IR, PDV and final sign-off.
- Lead physical design and implementation of high-performance blocks and system-level components.
- Collaborate with micro-architecture teams to explore PPA (performance, power, area) trade-offs.
- Perform implementation feasibility studies and provide design recommendations to meet PPA targets.
- Develop and maintain methodologies, scripts, and recipes for physical implementation stages and automation.
- Execute physical verification tasks including DRC, LVS and PDV flows to ensure design quality.
Requirements
Core technical requirements and preferred skills.
Must-have:
- Proven experience across physical design flows: synthesis, floorplanning, place & route, static timing analysis, CTS, timing & power closure, EM/IR and PDV.
- Hands-on experience with industry tools such as Synopsys Design Compiler, PrimeTime, ICC, Fusion Compiler or equivalent.
- Experience implementing clock trees and power delivery networks.
- Scripting skills for flow automation (e.g., Python, Tcl).
- Good knowledge of high-performance and low-power microarchitecture and logic design principles; basic SystemVerilog RTL familiarity.
- Understanding of advanced process nodes (sub-7nm) and related device/physical considerations.
- Strong communication and collaboration skills; able to work with cross-functional teams.
Nice-to-have:
- Experience with multi-die or chiplet integration and system-level physical design considerations.
- Prior work on methodology development for complex SoC or IP projects.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field (BS/MS in EE or CE).
About the Company
Company: Baya Systems
Headquarters: Santa Clara, CA, USA
Baya Systems is a fast-moving Series B startup focused on accelerating intelligent computing in the emerging chiplet era. They design and license disruptive intellectual property for semiconductor chips and provide software-driven solutions for single-die and multi-die systems. Their contributions aim to simplify the design process for complex System-on-Chip (SoC) and multi-chiplet systems across various markets such as data center, AI, and automotive.
