Job Title
Senior Physical Design Engineer
Role Summary
Senior engineer responsible for physical implementation of complex, low-power ASIC designs. Works with the full ASIC implementation team to deliver floorplan, place-and-route, timing closure, power sign-off and physical verification using industry-standard Cadence tools.
Position is a contract engagement (6+ months, possible extension). Richardson, TX office with remote option. US citizen or permanent resident required.
Experience Level
Senior β 5+ years of relevant industry experience in VLSI physical/design implementation.
Responsibilities
Accountable for end-to-end physical design delivery and for resolving design and flow issues; will plan and coordinate tools, budget and team efforts to meet project milestones.
- Architect system and implementation requirements for ASIC projects.
- Collaborate with digital design, verification and sign-off teams throughout implementation.
- Develop and enhance digital/physical design flows; diagnose and fix issues in Cadence Genus, Innovus, Tempus.
- Lead physically aware synthesis, DFT insertion, floorplanning, place-and-route and timing closure.
- Perform static timing analysis, parasitic extraction, power/IR drop and electromigration analysis.
- Drive physical verification and sign-off to production standards.
- Plan and justify tool usage, resource allocation and project milestones.
Requirements
Must-have technical skills, compliance and experience for immediate contribution.
- 5+ years hands-on experience in high-reliability, low-power VLSI design implementation.
- 5+ years practical experience with Cadence Genus, Innovus and Tempus.
- Proven production experience with floorplanning, synthesis, place-and-route optimization and sign-off flows.
- Experience with parasitic extraction, static timing analysis, low-power intent (UPF/CPF), power/IR drop analysis and electromigration checks.
- Skilled with Verilog/VHDL RTL and able to modify RTL for timing or power closure.
- Basic programming/scripting proficiency (Perl, C, TCL).
- Strong understanding of reliability, test and power design trade-offs.
- US Citizenship or US Permanent Residency required.
- Nice-to-have: knowledge of MIPI, I2S, CAN protocols.
Education Requirements
Bachelor of Science or Master of Science in Electrical Engineering (BSEE/MSEE) indicated. ITAR compliance approval is required. (Source also specifies 5+ years of related industry experience.)
About the Company
Company: Chelsea Search Group
Chelsea Search Group is a technical recruiting firm that connects engineering and technology professionals with employers, specializing in semiconductor, SoC, embedded systems, and related hardware/software roles.

Date Posted: 2026-05-31