Senior NPI Test Engineer

Job Title

Senior NPI Test Engineer

Role Summary

Technical lead for new product introduction (NPI) test development across mixed-signal and RF product lines. Responsible for defining test architecture from early silicon validation through high-volume manufacturing, driving testability and DFT standards, and delivering test methodologies for high-speed SerDes and signal-conditioning ICs.

Experience Level

Senior — typically requires 8+ years of semiconductor test engineering experience with at least 4 years in mixed-signal/RF test development.

Responsibilities

Accountable for technical strategy, cross-functional NPI support, production transfer, and mentoring within test engineering.

• Architect test strategies for complex mixed-signal/RF SiGe products from concept to production.
• Develop innovative test methodologies for high-speed SerDes, CDRs, and signal-conditioning devices (targets >200Gbps).
• Define and drive DFT/testability requirements into IC architecture and establish company-wide standards.
• Create reusable test IP, libraries, and frameworks to accelerate NPI cycles.
• Perform technical risk assessments and define mitigation strategies for test coverage and quality.
• Act as test authority in product architecture reviews and gate meetings; partner with IC design and product engineering.
• Lead test readiness reviews and coordinate with customer quality and OSAT partners for transfer to production.
• Establish and monitor KPIs for test effectiveness, first-pass yield, and test cost; drive continuous improvement.
• Mentor junior engineers and maintain comprehensive test methodology documentation and training materials.

Requirements

Must-have technical skills and proven experience relevant to the role.

• 8+ years in semiconductor test engineering; 4+ years in mixed-signal/RF test development.
• Expert-level experience with Advantest V93000 (SmarTest 7/8).
• Advanced programming in C/C++, Python, and TCL for test development and automation.
• Deep knowledge of high-speed signal integrity, jitter analysis, and BER testing.
• Experience with analog/mixed-signal DFT techniques (BIST, scan, boundary scan) and RF/microwave test methods (beyond 40 GHz).
• Practical experience with statistical process control, quality methodologies, and test data analysis.
• Familiarity with PCB design tools (Cadence, Altium) and signal-integrity simulation tools.
• Demonstrated leadership delivering complex NPI programs and influencing cross-functional teams; strong presentation skills.
• Nice-to-have: experience with SiGe BiCMOS processes, automotive qualification standards (AEC-Q100), 93000 PS1600/PS5000 channels, Wave Scale RF, wafer-level testing, probe card design, and test-data analytics/machine-learning applications.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related engineering field is required. A Master's degree or PhD in a relevant discipline is preferred.

About the Company

Company: Semtech

Headquarters: Camarillo, California, USA

Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.