Senior Modem Design Verification Engineer

Job Title

Senior Modem Design Verification Engineer

Role Summary

Work on verification of digital modem blocks for low-power wireless System-on-Chip products on the Wireless PHY/MAC team. The role focuses on developing verification strategies, building scalable SystemVerilog/UVM environments, and driving functional and coverage closure across PHY and MAC layers.

Experience Level

Senior — typically 5–8 years of experience in digital design verification; experience with modem or wireless PHY designs preferred.

Responsibilities

Primary responsibilities include planning and executing verification for digital modem designs and collaborating across design, firmware, and system teams.

• Define and execute verification strategies for modem/PHY digital blocks across key wireless use cases.
• Develop and maintain scalable verification environments using SystemVerilog and UVM.
• Create test plans, testbenches, stimuli, and directed/random tests to achieve functional and coverage goals.
• Debug simulation failures and root-cause complex issues with design and architecture teams.
• Track and drive functional and code coverage to closure.
• Collaborate with firmware, validation, and system teams to validate end-to-end behavior.
• Support silicon bring-up and correlate pre-silicon verification with post-silicon results.
• Improve verification methodologies, tools, and automation workflows.

Requirements

Must-have technical skills and experience, followed by preferred (nice-to-have) items.

• Must-have: 5–8 years of experience in digital design verification with a focus on modem or wireless PHY designs preferred.
• Must-have: Proficiency in SystemVerilog and UVM (or equivalent methodologies).
• Must-have: Strong debugging skills with experience analyzing simulation results and isolating root causes.
• Must-have: Familiarity with scripting (Python, Perl) for test automation.
• Must-have: Basic understanding of wireless communication systems or digital signal processing concepts.
• Must-have: Ability to collaborate across cross-functional teams and drive verification to completion.
• Nice-to-have: Experience with wireless standards (BLE, Wi‑Fi, Zigbee) and advanced verification techniques (constrained-random, coverage-driven, SVA).
• Nice-to-have: Familiarity with C/C++ or MATLAB for modeling and reference models; mixed-signal or system-level verification experience.
• Nice-to-have: Exposure to post-silicon validation, lab bring-up, correlation with pre-silicon, and low-power verification methodologies.

Education Requirements

Bachelor of Science in Electrical Engineering, Computer Engineering, or a related technical field (BSEE/BSC ECE/CE). The posting lists a BSEE/CE as the minimum education requirement.

About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.