Senior Mixed Signal IP Enablement and Debug Engineer

Job Title

Senior Mixed Signal IP Enablement and Debug Engineer

Role Summary

Join Intel's Hard IP Development Group (HIPD) to enable, validate, and debug mixed-signal IPs (PLLs, high-speed serial and parallel PHYs) across pre-silicon and post-silicon phases. The role works with IP design teams and SoC customers to integrate IPs, lead silicon bring-up, and resolve IP-related issues.

Experience Level

Senior — typically requires 5+ years of relevant industry experience in IP integration, pre- and post-silicon validation, or equivalent practical experience.

Responsibilities

Primary responsibilities include IP enablement on SoCs, leading silicon validation and debug, and collaborating with cross-functional teams and customers.

• Partner with SoC customers and IP design teams to provide pre-silicon to post-silicon IP integration and debug support.
• Develop and execute test plans and test content; script and automate tests using Python and SystemVerilog.
• Conduct SoC board design reviews and provide technical recommendations for integration.
• Use lab equipment (oscilloscopes, logic analyzers, protocol analyzers, BERTs) for validation and debug.
• Act as the IP representative during silicon bring-up and power-on activities for test chips and products.
• Lead investigation, root-cause analysis, and resolution of IP-related silicon issues.
• Perform signal integrity and power integrity simulations where applicable to optimize performance.
• Document findings, communicate status to stakeholders, and disposition customer-reported issues promptly.

Requirements

Must-have technical skills and hands-on experience for consideration.

• Experience with IP integration and post-silicon validation and debug for serial IOs (PCIe, USB, SATA, Type-C, Ethernet) or parallel IOs (DDR, LPDDR, UCIe Die-to-Die).
• Practical lab experience with test hardware and software (experience with lab hardware preferred).
• Hands-on use of oscilloscopes, logic analyzers, protocol analyzers, and BERTs.
• Proven ability to develop and execute test plans and to script test content (Python, SystemVerilog).
• Strong problem-solving and root-cause analysis skills; ability to lead debug activities both remotely and onsite.
• Effective cross-functional collaboration and customer-facing communication skills.

Nice-to-have:

• Experience in signal integrity, power delivery, IBIS-AMI model development, and silicon co-relation.
• Pre-silicon design or simulation experience in logic, circuits, firmware, memory reference code (MRC), or mixed-signal validation.

Education Requirements

Bachelor's degree in Computer Engineering, Electrical Engineering, or a related field with 5+ years of relevant experience, or a Master’s degree in those fields with 3+ years of relevant experience. A Ph.D. in Computer or Electrical Engineering is preferred. Equivalent practical experience may be considered.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.