Senior Memory Controller RTL Design Engineer

Job Title

Senior Memory Controller RTL Design Engineer

Role Summary

Join Microsoft's Compute Silicon & Manufacturing Engineering team to design and deliver high-performance memory-controller RTL for cloud-scale SoCs. The role focuses on micro-architecture, RTL implementation in Verilog/SystemVerilog, integration into SoC environments, and delivering production-quality IP.

This is an individual contributor role working with cross-functional hardware and IP teams to meet area, power, and performance targets for Microsoft's cloud infrastructure.

Experience Level

Senior. Preferred experience: multi-year high-performance memory controller or SoC front-end design; the posting prefers 6+ years of relevant memory-controller design experience but minimum experience depends on degree (see Education Requirements).

Responsibilities

Deliver RTL memory-controller blocks from micro-architecture through SoC integration and verification readiness.

• Define and implement micro-architectural specifications in Verilog/SystemVerilog.
• Optimize implementations for area, power and performance.
• Integrate memory controller IP into SoC designs and collaborate with IP providers.
• Create basic tests to exercise block functionality and support verification efforts.
• Perform design-quality checks: lint, CDC/RDC, low-power intent checks, and timing QoR verification.
• Automate repetitive tasks using scripting and apply AI where effective to improve efficiency.
• Collaborate with cross-functional teams to deliver high-quality functional blocks on schedule.

Requirements

Minimum technical skills, security and operational requirements. Degree and years mapping are in Education Requirements.

• Highly proficient in Verilog/SystemVerilog coding and front-end digital design practices.
• Strong knowledge of high-speed design principles and DDR4/DDR5 controller concepts.
• Familiarity with front-end tools: simulators, connectivity tools, CDC checkers, low-power static checkers, and lint tools.
• Familiarity with synthesis and STA flows.
• Ability to write automation scripts (Perl, Tcl, Python, or similar).
• Ability to meet Microsoft security and export-control screening requirements; access to export-controlled information may be required.

Nice-to-have:

• Multiple years (preferred 6+) designing and implementing high-performance DDR4/DDR5 memory controllers.
• Experience with multi-bit error correction (e.g., Reed–Solomon) and industry interface protocols (CHI, APB, AMBA).
• Applied low-power design experience and prior SoC/IP development experience.

Education Requirements

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field + 1+ year technical engineering experience; OR Master's degree in those fields + 4+ years; OR Bachelor's degree in those fields + 5+ years; OR equivalent practical experience. Fields referenced: Electrical Engineering, Computer Engineering, Computer Science, or related technical fields.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.