Senior Member of Technical Staff (SMTS) — RF Layout Designer

Job Title

Senior Member of Technical Staff (SMTS) — RF Layout Designer

Role Summary

Lead the physical implementation of high-performance RF/analog devices, test structures, and PDK enablement. Bridge circuit design, device/process technology, and manufacturable CMOS layout to ensure performance, yield, and reliability while enabling new process nodes.

Experience Level

Senior — typical experience ranges: BS + 8–10 years, MS + 7+ years, or PhD + 5+ years in RF/analog layout, CMOS process technology, or related fields.

Responsibilities

Provide technical leadership for layout implementation, technology enablement, and project delivery.

• Lead physical implementation of RF/analog test structures and circuits for technology development.
• Deliver qualification/test chips on schedule and within cost constraints.
• Collaborate with device and process teams to define and validate design rules and layout methodologies.
• Support PDK enablement, layout guidelines, and design automation improvements.
• Create and modify layouts and develop automation scripts to increase productivity.
• Mentor and train junior engineers; lead small teams or medium-size projects as required.
• Provide actionable feedback to improve design rules, PDK quality, and yield.

Requirements

Must-have technical capabilities; preferred items noted.

• Proven expertise in CMOS RF/analog physical layout and manufacturable design techniques.
• Experience collaborating with circuit designers and process/device engineers to meet performance and yield targets.
• Track record of delivering qualification/test chips and driving cross-functional projects to completion.
• Demonstrated leadership ability to coordinate and mentor small engineering teams.
• Strong problem-solving skills for complex, novel technical challenges.
• Preferred: experience with Cadence Virtuoso and SKILL scripting for layout automation.
• Preferred: familiarity with foundry design rules and PDKs, including layout rule reasoning and compaction.
• May require ability to obtain a U.S. Department of Defense security clearance in the future.

Education Requirements

Required: technical university degree. Typical qualifications: BS with 8–10 years' relevant experience, MS with 7+ years, or PhD with 5+ years. Local HR may approve exceptions.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.