Job Title
Senior Manager - SOC Verification
Role Summary
Senior verification lead in the dsPIC Microcontroller Business Unit responsible for ensuring functional correctness of next-generation MCU system-on-chips (SoCs). The role drives verification strategy and execution for SoCs that include ARM Cortex-M and proprietary RISC cores.
Experience Level
Senior-level; typically 10+ years of SoC verification experience.
Responsibilities
Primary responsibilities include planning and executing verification for MCU SoCs and mentoring a global verification team.
- Lead verification strategy and execution for MCU SoCs (ARM Cortex-M and proprietary cores).
- Perform design verification of complex digital macros at the SoC level from architectural descriptions.
- Develop tests and testbench environments using VMM/UVM/SystemVerilog.
- Perform RTL and gate-level verification for MCU products (including legacy 16-bit and next-generation 32-bit devices).
- Analyze gate-level simulations and timing violations; coordinate with STA teams to resolve issues.
- Create functional-safety tests, run fault-injection simulations, and perform coverage analysis.
- Debug complex full-chip issues and support integration across IP blocks.
- Mentor and develop junior verification engineers; promote automation and advanced verification techniques.
Requirements
Must-have skills and experience.
- 10+ years of SoC verification experience.
- Expert-level SystemVerilog and UVM (Universal Verification Methodology).
- Strong experience with formal verification (property checking, connectivity checking) using tools such as JasperGold or VC Formal.
- Strong hands-on STA and timing-analysis experience.
- Deep understanding of microcontroller peripherals (DMA, timers, ADC/DAC interfaces, security modules, functional-safety related blocks).
- Direct experience verifying SoCs with ARM Cortex-M cores and proprietary RISC-based architectures.
- In-depth knowledge of AMBA protocols (AHB, APB, AXI).
- Experience defining coverage-driven verification metrics and managing large regression suites; ability to develop module-level verification plans and integrate module testbenches at full-chip level.
- Strong debug skills for full-chip verification and integration issues.
Nice-to-have:
- Gate-level simulation (GLS) and power-aware verification experience.
- Post-silicon validation experience and alignment of pre-silicon test plans with customer validation.
- Analog mixed-signal (AMS) simulation exposure.
- Familiarity with functional safety standards (ISO 26262) for automotive MCUs.
- Willingness to travel up to 25%.
Education Requirements
Bachelor of Engineering in Electronics/Electrical or Computer Science (or equivalent technical degree) as stated in the source posting.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.

Date Posted: 2026-08-19