Senior Manager - RTL Design

Role Overview

As a Senior Manager at AMD, you will lead a high-performance design team focused on delivering cutting-edge DDR IP solutions. This position requires a deep understanding of digital logic design and RTL development, along with a commitment to building and mentoring engineering teams. Your role includes collaborating closely with various departments to ensure timely and high-quality silicon delivery.

Experience Requirements

The ideal candidate should possess over 15 years of experience in digital logic design, including at least 2 years in people management and employee development. Strong expertise in Verilog/System Verilog is essential, along with experience in high-speed design and optimization methods.

Core Responsibilities

Your key responsibilities will include:

• Leading the RTL design process for complex IP blocks from micro-architecture definition to production.
• Collaborating with cross-functional teams to guarantee product success.
• Mentoring and growing a team of RTL design engineers.
• Driving resource planning, task allocation, and schedule management.
• Ensuring high-quality RTL delivery through best practices in design methodology.

Qualifications

Candidates must have strong analytical and problem-solving skills, along with experience in project planning and risk management. Excellent communication skills are required, as well as proficiency in scripting languages such as Perl, Python, or TCL.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is preferred to support your role effectively.