Senior Manager, Package Signal & Power Integrity

Job Title

Senior Manager, Package Signal & Power Integrity

Role Summary

Lead a small engineering team delivering signal integrity (SI) and power integrity (PI) solutions for advanced 2.5D/3D chiplet-based package platforms. This is a player-coach role: set technical direction for package-level SI/PI while remaining hands-on with modeling, simulation, and post-silicon correlation.

The role spans early architecture through high-volume production and requires partnership with silicon design, physical design, system architecture, and external packaging vendors to ensure robust signaling and power delivery across die-to-die, memory, and high-speed SerDes interfaces.

Experience Level

Senior-level. The role expects extensive SI/PI expertise - typically 12+ years of relevant engineering experience and 3+ years of direct people-management experience.

Responsibilities

Lead technical and delivery work for package SI/PI across advanced packaging platforms and drive cross-functional alignment.

• Lead and develop a team of SI/PI engineers; set priorities and drive career growth.
• Define and execute SI/PI methodology for 2.5D/3D packages (interposer, RDL, TSV, bridge-based architectures).
• Perform end-to-end SI/PI analysis and co-design for HBM, PCIe, UCIe die-to-die interconnects, and high-speed SerDes links.
• Own PDN design and sign-off across die, interposer, package substrate, and PCB (AC/DC/transient droop, decoupling strategy).
• Develop and validate channel models (S-parameters, IBIS-AMI) and perform BER/eye-diagram analysis for multi-lane links.
• Establish SI/PI design guidelines, sign-off criteria, and automation flows to improve accuracy and productivity.
• Drive post-silicon validation and model-to-hardware correlation using VNA, TDR, oscilloscopes, and spectrum analyzers.
• Collaborate with ASIC architects, PHY/IP teams, package layout, thermal/mechanical, PCB, and system teams and engage external suppliers for technology assessment and DFM trade-offs.

Requirements

Key must-have skills and experience for immediate contribution.

Must-have

• 12+ years of SI/PI engineering experience in semiconductor packaging (IC package, interposer, or substrate design).
• 3+ years of direct people-management experience leading SI/PI or packaging engineering teams.
• Demonstrated expertise in advanced packaging: CoWoS, EMIB, Foveros, 3D die stacking, TSV, RDL, flip-chip BGA.
• Hands-on SI/PI analysis experience for high-speed SerDes at NRZ and PAM4 data rates (e.g., 56G NRZ, 112G+ PAM4).
• Experience with HBM SI/PI design and timing budget methodology (HBM3/HBM3E/HBM4 or similar).
• Experience with PCIe Gen5/Gen6 channel design, compliance, and package/system sign-off.
• Working knowledge of UCIe or comparable die-to-die interconnect standards for chiplet architectures.
• Proficiency with industry EDA/simulation tools (examples: Ansys HFSS/SIwave/Q3D, Cadence Sigrity, Keysight ADS, HSPICE/Spectre).
• Strong scripting skills for automation and analysis (Python, MATLAB, Tcl).
• Proven ability to drive cross-functional alignment across silicon, package, board, and system teams.

Nice-to-have

• Experience with PCIe Gen7, 200G/400G Ethernet SerDes, or NVLink-class interconnects.
• Experience with advanced UCIe protocol-level SI/PI and latency-sensitive chiplet integration.
• Familiarity with next-generation HBM standards and PHY/package co-design challenges.
• Experience with EMI/EMC analysis, thermal-aware SI/PI, on-die EMIR/DVD analysis, and chip-package PDN co-simulation.
• Exposure to evaluating emerging packaging platforms (glass substrate, hybrid bonding, fan-out panel-level packaging).

Education Requirements

Master's degree or PhD in Electrical Engineering (or related technical field) is listed as preferred. The posting also cites an alternative path of equivalent practical experience (e.g., a Master’s degree or PhD, or in some cases a Master’s plus 8+ years of practical semiconductor design work). Fields referenced include electromagnetics, signal integrity, power integrity, and microelectronics.

About the Company

Company: KGS

KGS is a government and commercial contracting firm that provides engineering, technical, and staffing solutions, often supporting aerospace, defense, and IT projects for federal and industry customers.