Senior Manager - Design Engineering
MicrochipJob Title
Senior Manager - Design Engineering
Role Summary
Lead technical and people efforts to design high-performance communication semiconductor devices and subsystems. Establish and scale a Silicon Design Center in Bangalore, defining technical direction, development methodology, and engineering culture.
The role combines hands-on RTL and verification authority with managerial responsibilities including hiring, mentoring, and delivering complex tape-outs across the full silicon development lifecycle.
Experience Level
Senior - position expects a seasoned leader; 14+ years of relevant industry experience is preferred.
Responsibilities
Accountable for technical leadership, delivery, and team development across RTL design projects.
- Lead and grow a team of 20+ engineers; manage resourcing, performance reviews, and career development.
- Drive end-to-end RTL design execution: architecture, coding, verification, synthesis, sign-off, and silicon bring-up support.
- Serve as technical authority for digital design to meet targets for quality, performance, power, and area.
- Resolve cross-domain design and EDA tool challenges impacting schedule or silicon quality; collaborate with physical design, software, validation, and product teams.
- Improve methodologies and automation across design, verification, and validation; evaluate and integrate new techniques and AI-driven tools.
- Coordinate with external vendors and internal stakeholders for integration and release to production.
- Travel: up to 25% as required for project and cross-site coordination.
Requirements
Key technical and leadership requirements. Must-haves are listed first; assets/nice-to-have follow.
- Must-have: Proven leadership, coaching, and mentoring skills with experience managing large engineering teams.
- Must-have: Deep expertise across all phases of silicon development with strong RTL design and verification skills.
- Must-have: Strong understanding of functional verification flows and environments; proven delivery of multiple complex tape-outs.
- Must-have: Hands-on experience with lint, CDC, formal verification, logic synthesis, static timing analysis, and interactions with physical design teams.
- Must-have: Experience with low-power design methodologies and DFT concepts (scan and testability considerations).
- Nice-to-have / Asset: Experience with Synopsys or Cadence synthesis, verification or STA tools.
- Nice-to-have / Asset: Experience with 28nm and smaller process technologies and ASIC EDA tool environments.
Education Requirements
Degree in Electrical Engineering (Bachelor's or higher) is required per the posting.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.
