Senior Logic Design Engineer

Job Title

Senior Logic Design Engineer

Role Summary

Design RTL for a high-performance PCIe subsystem supporting Microsoft's Azure Cobalt within the Compute Silicon & Manufacturing Engineering organization. The role focuses on delivering functional, high-quality logic blocks that meet area, power, performance and manufacturability targets and that integrate with SOC-level requirements.

Experience Level

Senior-level. Microsoft specifies degree-plus-years combinations (PhD + 1 year, MS + 4 years, BS + 5 years) or equivalent experience; typical hires have 5+ years of relevant RTL/system design experience.

Responsibilities

Primary responsibilities include designing and delivering PCIe subsystem RTL and collaborating with cross-functional teams to meet SoC goals.

• Design and integrate multiple IP blocks to build a PCIe subsystem.
• Collaborate with architects and IP providers to ensure subsystem meets SoC requirements.
• Refine implementations for area, power and performance trade-offs.
• Perform design quality checks: synthesis, lint, CDC, RDC, low-power intent, and logic equivalence.
• Analyze dataflow and clocking; drive solutions for timing-critical paths and timing closure.
• Automate tasks with scripting to improve efficiency.
• Deliver high-quality functional blocks on schedule and collaborate respectfully across teams.

Requirements

Must-have technical skills, security and export-control compliance. Degree information moved to Education Requirements below.

• Proven RTL design experience for high-speed interfaces, preferably PCIe.
• Experience with industry interfaces such as AXI/APB and familiarity with ARM fabric IPs.
• Experience with EDA and verification tools (examples: VCS, Questa CDC, Spyglass, Fusion Compiler, Design Compiler, Genus).
• Proficiency with UPF/low-power intent, clock-crossing techniques, and static timing analysis.
• Ability to write scripts (Python, Tcl, Perl) for automation and flow integration.
• Experience with IPXACT, timing constraints, SDC/TCL constraints and timing signoff fundamentals.
• Applied understanding of low-power design principles, power and clock-domain crossing closure.
• Ability to pass Microsoft Cloud Background Check and meet required export-control eligibility checks; citizenship or residency documentation will be required for export-controlled information access.
• Will work onsite 3 days per week in-office as part of a hybrid schedule.

Education Requirements

PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with 1+ years technical engineering experience; OR Master's in those fields with 4+ years; OR Bachelor's in those fields with 5+ years; OR equivalent practical experience.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.