Senior Lead Engineer - Verification

Job Title

Senior Lead Engineer - Verification

Role Summary

Individual contributor responsible for leading and delivering verification for complex digital IPs and subsystems to achieve first-pass silicon success. Works with architecture, design, DFT, mixed-signal, and validation teams across sites to execute verification using simulation, formal methods, hardware modelling, and pre/post-silicon validation.

Experience Level

Senior — 10–15 years of experience in digital IP or subsystem verification.

Responsibilities

Lead verification planning and execution, improve verification flows, and collaborate across global teams to ensure high-quality silicon delivery.

• Lead end-to-end verification for complex IPs and subsystems, driving first-pass silicon success.
• Define and maintain verification quality metrics across planning, execution, and closure.
• Design and implement scalable verification methodologies and automation to manage design complexity.
• Develop, review, and maintain testbench architectures; implement regressions and debug failures.
• Drive coverage closure, defect prevention, and process adherence to support a ‘Zero Defect’ mindset.
• Analyze and optimize verification flows for efficiency, predictability, and quality.
• Collaborate with Design, DFT, Architecture, and Validation teams; support pre- and post-silicon validation activities as needed.
• Mentor junior engineers and influence technical direction within the team.

Requirements

Must-have technical skills and experience required for the role; followed by desirable skills.

• Must-have: 10–15 years of hands-on IP or subsystem verification experience for multi-million gate designs.
• Strong expertise in HVLs such as SystemVerilog and UVM; proficiency in C/C++.
• Solid knowledge of HDLs (Verilog/VHDL) and experience with industry simulators (VCS, NCSim, ModelSim, Questa).
• Experience in testbench architecture, test planning, feature traceability, regression management, and functional/performance validation.
• Knowledge of assertions (SVA), functional coverage, and verification closure practices.
• Familiarity with microcontroller architectures (ARM) and interconnect protocols (AHB, AXI, AMBA).
• Experience with memory subsystems (SRAM, Flash, DDR) and memory controllers.
• Proven ability to work in distributed/global engineering teams and take ownership of deliverables.
• Nice-to-have: Exposure to formal verification, gate-level simulation, emulation/pre-silicon environments, and domain knowledge in automotive, graphics/vision accelerators, high-speed serial interfaces, or networking protocols such as Ethernet.

Education Requirements

Not specified.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.