Senior Lead Engineer - STA

Job Title

Senior Lead Engineer - STA

Role Summary

Lead the Static Timing Analysis (STA) signoff function for an SoC or subsystem through tapeout. Responsible for writing and validating timing constraints, coordinating with frontend, DFT and IP teams, and refining constraints across the SOC design cycle.

Drive STA signoff strategy, contribute to physical design problem solving, and apply AI techniques to STA activities.

Experience Level

Senior. No specific years of experience stated.

Responsibilities

Primary responsibilities include timing signoff, constraints development, cross-team coordination, and physical design closure support.

• Perform complete STA signoff for subsystem or full-chip until tapeout.
• Write and refine timing constraints throughout the SOC design cycle.
• Validate constraints and SDF generation/flows.
• Coordinate with Frontend, DFT, and IP teams to ensure correct constraints and timing closure.
• Support signal integrity (SI) closure and related analysis.
• Work with physical design teams on placement, CTS (clock tree synthesis), and routing interactions.
• Define and drive physical design strategy per technology node.
• Apply AI techniques to improve STA processes and automation.

Requirements

Key must-have skills and desirable experience for the role.

• Must-have: Proven experience leading STA signoff for subsystem or full-chip through tapeout.
• Must-have: Hands-on experience writing and validating timing constraints and SDF generation/validation.
• Must-have: Strong knowledge of SI closure practices.
• Must-have: Familiarity with physical design flows and functions, including placement, CTS, and routing interactions.
• Must-have: Experience collaborating with Frontend, DFT, and IP teams to resolve timing issues.
• Must-have: Exposure to advanced process nodes (examples given: 16nm and 5nm).
• Must-have: Ability to lead signoff function and define signoff strategy per technology node.
• Must-have: Experience using or experimenting with AI techniques in STA activities.
• Nice-to-have: Prior work on full-chip physical design strategy and cross-team process improvements.

Education Requirements

Not specified.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.