Job Title
Senior Layout Engineer
Role Summary
Lead technical execution of advanced memory IP layouts with hands-on responsibility for floorplanning, placement, routing and signoff. Partner with layout leads, CAD, and process teams to deliver manufacturable, high-quality layout solutions on advanced process nodes.
Experience Level
Senior β typically 5β8+ years of layout experience.
Responsibilities
Accountable for end-to-end physical layout delivery, verification, and process optimization.
- Own layout design and verification of critical memory IP blocks, including floorplanning, placement, routing, and signoff.
- Troubleshoot and resolve layout issues; drive technical solutions and improvements.
- Develop and implement automation scripts to accelerate layout cycles and improve quality.
- Conduct technical reviews and benchmarking of layout deliverables.
- Provide technical input on project planning and risk assessment.
- Collaborate with layout leads, CAD, and process teams to optimize layout flows and methodologies.
Requirements
Must-have technical skills and experience.
- 5β8+ years of custom layout experience, preferably in memory IP or analog/mixed-signal domains.
- Proficient with layout capture tools (Cadence Virtuoso or equivalent).
- Proficient with layout verification tools (Calibre, ICV, StarRC).
- Familiarity with advanced process nodes (e.g., 5nm, 3nm) and associated challenges.
- Strong attention to detail and ability to work in a fast-paced environment.
- Ability to work on-site in Da Nang and communicate in English with an overseas team.
- Experience with automation scripting for layout flows (preferred).
Education Requirements
B.S. or M.S. in Electrical Engineering or a related technical field.
About the Company
Company: Mixel

Date Posted: 2026-06-01