Senior Layout Designer - Pathfinding

Job Title

Senior Layout Designer - Pathfinding

Role Summary

Develop and prepare multi-dimensional layouts and detailed drawings of semiconductor devices from schematics and geometry provided by design engineers. Verify data integrity, lead major block developments, and collaborate with global design, verification, and CAD teams.

Improve layout efficiency through automation and mentor junior designers.

Experience Level

Senior-level. Minimum 3 years of direct semiconductor layout design experience (per posting).

Responsibilities

Primary responsibilities include technical leadership, delivery of layout blocks, and process improvements.

• Lead, plan, and deliver major blocks and product revisions.
• Develop and prepare multi-dimensional layouts and detailed drawings from schematics.
• Assign resources, schedule tasks, and ensure quality-controlled results to meet deadlines.
• Develop automation and new methodologies to improve layout efficiency.
• Mentor and train junior team members; contribute to group management and technical innovation.
• Collaborate across globally distributed design/layout teams and other functional groups.
• Perform design reviews, check dimensions, and verify completed drawings and layouts.

Requirements

Must-have technical skills and experience:

• Deep working knowledge of EDA tools such as Cadence Virtuoso, Synopsys, and Calibre.
• Strong debugging and root-cause analysis skills; experience resolving layout/verification issues.
• Expertise in custom layout techniques, floor-planning, signal planning, and power planning.
• In-depth understanding of design rules and physical verification methodologies; strong physical verification analysis skills.
• Proven communication skills (verbal and written) and ability to collaborate with engineering teams.
• Experience developing automation or tooling to improve layout workflows.

Nice-to-have:

• IC layout experience with NAND, DRAM, and/or SRAM.
• Project leadership in quality optimization and die-size shrinkage.
• Programming skills and experience applying AI to layout workflows.

Education Requirements

AS or Bachelor's degree in Electronics, Electrical Engineering, or a related field is required (posting lists AS or Bachelor's). BS in a related field is listed as preferred. The posting also specifies a minimum of 3 years of direct semiconductor layout design experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.