Senior IC Layout Design Engineer

Job Title

Senior IC Layout Design Engineer

Role Summary

Senior layout engineer responsible for block- and chip-level physical implementation of high-speed analog/mixed-signal IPs, with emphasis on SerDes and PLL blocks in advanced FinFET processes. Work includes floorplanning, power distribution, signal routing, post-layout performance analysis, verification signoff, and improving layout automation and methodologies.

This role interacts with circuit and digital design teams and may supervise layout resources to ensure quality and schedule delivery.

Experience Level

Senior. (Title indicates senior-level responsibilities; no explicit years-of-experience specified.)

Responsibilities

Key responsibilities for the role:

• Implement block-level physical designs: floorplanning, power distribution, and signal routing for analog/mixed-signal IPs.
• Design and optimize layouts for high-speed SerDes and related analog/mixed-signal circuits.
• Perform post-layout circuit performance analysis and integration at block/IP/chip levels.
• Develop and refine layout methodologies, pcell libraries, and automation scripts to increase productivity.
• Conduct physical verification (LVS/DRC/ERC/ANT/ESD) and ensure manufacturing readiness.
• Estimate schedules, track project progress, and report status to stakeholders.
• Supervise and review layout resources; provide feedback to design teams on layout quality and integration.

Requirements

Must-have technical skills and experience:

• Practical experience in layout for advanced process nodes (7 nm or below).
• Strong understanding of analog/mixed-signal layout fundamentals: IR/EM, capacitance effects, and RC delay impact on performance.
• Proficiency in high-speed signal routing and shielding techniques.
• Experience with physical design verification flows (LVS, DRC, ERC, antenna checks, ESD considerations).
• Familiarity with IC manufacturing processes and circuit design concepts relevant to layout implementation.
• Experience with layout productivity tools and scripting (Cadence SKILL; Perl, Python, or Tcl).
• Good communication skills and ability to collaborate with distributed teams across time zones.

Nice-to-have:

• Hands-on experience with high-speed SerDes blocks and PLLs in FinFET processes.
• Experience integrating analog/mixed-signal blocks into digital flows and system-level chips.

Education Requirements

Bachelor's degree in Electrical Engineering or Computer Engineering is specified in the source; the posting also allows equivalent IC layout training or equivalent practical experience. Fields referenced: Electrical Engineering / Computer Engineering. (No other degrees or certifications were specified.)

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.