Senior HSIO/DDR Bench Test Engineer

Job Title

Senior HSIO/DDR Bench Test Engineer

Role Summary

Position in the Post-Silicon Engineering group focused on developing test solutions for highly integrated SoCs. Responsible for defining and executing test methodologies and characterizing high-speed SERDES interfaces and DDR subsystems, driving first-silicon bring-up and debug, and collaborating with IC design, systems, customer engineering, and hardware applications teams.

Experience Level

Senior - the posting specifies experienced candidates; the minimum qualifications reference 5+ years of related experience (preferred).

Responsibilities

Primary responsibilities include test definition, silicon bring-up, characterization, and cross-functional debugging of high-speed interfaces and memory subsystems.

• Define and execute test methodologies and characterization plans for high-speed SERDES interfaces (PCIe, USB3, UFS, DP, MIPI) and PLLs.
• Characterize and validate LP-DDR and PC-DDR subsystems (DRAM, DDR controller, PHY IP, IOs, clocking, delay circuits, power distribution).
• Drive first-silicon bring-up and debug for designs fabricated at external foundries; qualify silicon across operating conditions and configurations.
• Analyze parametric performance data and optimize design/test parameters for electrical compliance.
• Assist hardware teams to diagnose and resolve power integrity (PI) and signal integrity (SI) issues related to package and board design.
• Collaborate with IC design, systems engineering, customer engineering, and hardware applications to resolve time-critical customer issues and RMAs.
• Develop and maintain lab test setups, automation, and documentation; perform specialized analyses and feasibility studies.

Requirements

Core technical and professional requirements; education details are summarized separately below.

• 5+ years of relevant hardware engineering or silicon/test experience (posting lists 5+ years as a minimum preference).
• Fluent English (strong verbal and written communication skills).
• Experience in silicon bench test, device-level characterization, and test methodologies for ASIC/SoC validation.
• Understanding of VLSI technologies, CMOS analog and digital circuits, mixed-signal concepts, and semiconductor physics.
• Strong problem-solving, debugging, organization, and documentation skills; able to work independently and take initiative.
• Ability to work effectively in fast-paced, multidisciplinary teams and to communicate results clearly to engineering partners.

Nice-to-have:

• Hands-on experience with lab equipment: oscilloscopes, TDR/VNA, J-BERT, BERTs.
• Experience with high-speed signal analysis: eye diagrams, differential signaling, jitter, and signal integrity testing.
• Familiarity with SERDES transmitter/receiver blocks and DDR protocols (DDR2/3/4/5, LPDDR variants).
• Experience with test automation using Python or C# and familiarity with board design (schematic/layout) practices.

Education Requirements

The posting references degrees and acceptable alternatives: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field; Master's degree in Electrical/Computer Engineering or related field (preferred); and PhD in relevant fields. It also lists alternative degree+experience combinations (e.g., Bachelor's + 2 years hardware engineering, Master's + 1 year, or PhD). Equivalent practical experience is indicated in lieu of degree in some combinations.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.