Senior FPGA Verification Engineer, Air Dominance and Strike

Job Title

Senior FPGA Verification Engineer, Air Dominance and Strike

Role Summary

Join the avionics verification team to own verification of AMD (Xilinx) FPGA/SoC designs for flight-critical systems in the Air Dominance and Strike domain. Work focuses on UVM-based, coverage-driven verification and bringing designs to closure for hardware and system-level validation.

Experience Level

Senior — requires substantial prior experience; the posting specifies 8+ years in FPGA/ASIC verification.

Responsibilities

Key responsibilities include designing and executing verification strategies, debugging at RTL and system level, and driving verification closure.

• Architect and implement UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs.
• Develop verification plans with traceability to system and hardware requirements and drive coverage to closure.
• Author SystemVerilog Assertions (SVA) and build functional coverage models; perform code coverage analysis.
• Create constrained-random and transaction-level test sequences to uncover corner cases.
• Maintain regression suites and track verification metrics and progress.
• Debug failures using waveform tools and simulation logs at the HDL and system level; collaborate on RTL reviews and bug resolution.
• Support hardware validation, board bring-up, and verification on target platforms.
• Ensure verification meets DO-254 and relevant safety standards; author closure reports and coverage summaries.

Requirements

Must-have technical skills, tools, and constraints for successful candidates.

• 8+ years of FPGA/ASIC verification experience.
• Proficient in SystemVerilog, UVM methodology, and SVA; experience extending UVM testbenches.
• Familiarity with industry simulators (e.g., Questa, VCS, Xcelium, Vivado).
• Applied object-oriented programming principles and experience with transaction-level testing.
• Experience with Git-based workflows and code review processes.
• Comfortable in Linux development environments.
• Strong communication and teamwork skills.
• Eligible to obtain and hold a U.S. Secret security clearance.

Nice-to-have:

• Extended verification experience (e.g., 12+ years) or deep avionics verification background.
• Experience with DO-254, safety-critical verification processes, SVUnit or unit-testing frameworks.
• Familiarity with formal verification or CDC verification tools; digital interfaces such as Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI.
• Verification automation scripting (Python, Tcl, Makefile), CI/CD integration, Nix-based build environments.
• SoC and ARM-based embedded platform experience.

Education Requirements

Required: Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. Preferred: Master’s degree in Electrical Engineering, Computer Engineering, or related field. (The posting also requires clearance eligibility.)

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.