Senior FPGA IP Solutions Engineer – Robotics Technology

Job Title

Senior FPGA IP Solutions Engineer – Robotics Technology

Role Summary

Hands-on senior engineer developing high-performance FPGA soft IP and low-level HAL/driver interfaces for robotics and industrial automation platforms. The role sits in a small technical robotics technology team focused on RTL IP for sensor ingestion, pre-processing, fusion pipelines, and real-time compute accelerators.

Primary responsibilities cover micro-architecture, RTL implementation, verification, timing closure, and integration with Quartus Prime / Platform Designer and system-level reference designs.

Experience Level

Senior - typically 10+ years of relevant FPGA/RTL engineering experience (per the minimum qualifications).

Responsibilities

Accountable for end-to-end FPGA IP delivery and low-level software interfaces, and for integrating IP into robotics reference platforms.

• Design, implement, and optimize Verilog/SystemVerilog soft IP for sensor ingestion, streaming pipelines, DSP, and compute accelerators.
• Define and maintain low-level HAL / driver APIs exposing IP to embedded and host software.
• Develop and maintain RTL micro-architecture, testbenches, and simulation/regression suites.
• Perform static timing analysis, clock-domain crossing verification, and drive timing closure.
• Debug designs via simulation, on-chip instrumentation (e.g. SignalTap), and lab bring-up on development boards.
• Integrate IP into system designs using Quartus Prime and Platform Designer (Avalon/AXI interconnects, streaming and memory-mapped fabrics).
• Support CI/regression flows, version control (Perforce/GitHub), and automated build/simulation infrastructure.
• Collaborate with software, systems, and applications engineers on HW/SW co-design and platform validation; contribute documentation and reference examples.

Requirements

Must-have technical skills and practical experience for immediate contribution to FPGA IP projects.

Must-have

• Strong production RTL design experience in Verilog and/or SystemVerilog targeting FPGAs.
• Hands-on RTL verification and simulation experience (ModelSim/Questa, VCS, or equivalent) and writing testbenches.
• Proven ability to close timing and optimize resource utilization on real FPGA designs.
• Working knowledge of Quartus Prime and Platform Designer or equivalent FPGA toolchain and system-integration flows.
• Experience debugging designs with on-chip instrumentation and performing board bring-up.
• Familiarity with Perforce and/or GitHub and CI systems such as Jenkins or TeamCity.
• Strong analytical, problem-solving, and written/verbal communication skills.

Nice-to-have

• Experience developing high-performance reusable FPGA soft IP (streaming pipelines, DSP, interconnects, accelerators).
• Deep FPGA architecture knowledge (pipelining, CDC, constraints, STA best practices).
• Experience with sensor data ingestion, pre-processing, sensor fusion, or mapping algorithms to hardware.
• Prior exposure to robotics systems and software stacks (e.g. ROS/ROS2).
• Motor control experience (FOC, PWM, encoders/resolvers, current/torque loops) is a plus.
• Scripting for automation (Tcl, Python, Perl) and familiarity with Avalon/AXI protocols and HAL/driver concepts.

Education Requirements

BSc or MSc (or equivalent) in Electrical / Electronic Engineering, Computer Engineering, Computer Science, or a related discipline - or equivalent practical experience.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.