Senior FPGA Engineer, EW

Job Title

Senior FPGA Engineer, EW

Role Summary

The Senior FPGA Engineer will lead end-to-end FPGA design and verification for software-defined radio (SDR) platforms used in electronic warfare (EW). You will work within the EW team to deliver FPGA-based processing architectures, integrate subsystems, and establish reliable design and verification processes on AMD/Xilinx SoC/FPGA platforms.

Experience Level

Senior - 8+ years professional experience.

Responsibilities

Key day-to-day responsibilities include:

• Own FPGA development for SDR platforms implementing EW functions.
• Design and verify VHDL/Verilog DSP modules and supporting FPGA infrastructure.
• Integrate modules into larger FPGA cores and resolve resource, timing, and routing issues.
• Bring up and validate high-speed boards with software and electrical engineers.
• Develop drivers and interfaces for custom RF components (PLLs, mixed-signal front ends).
• Work with CI/HITL processes and version control to support reproducible builds and testing.
• Manage project deliverables, documentation, and technical communication.

Requirements

Must-have technical skills and conditions:

• 8+ years professional experience in FPGA/embedded system development.
• Strong DSP implementation experience for embedded devices and/or software-defined radios.
• Experience with Xilinx/AMD SoC/FPGA architecture and tooling.
• Proficient in HDL (VHDL and/or Verilog) design and verification.
• Experience bringing up high-speed digital interfaces (PCIe, JESD, Aurora, multi-Gbps optical links).
• Proficiency in a Linux development environment and familiarity with Git and CI/CD workflows (including TCL, CI/HITL).
• Experience mentoring or leading small teams (1–3 engineers).
• Eligible to obtain and maintain a U.S. Secret security clearance.
• Strong written and verbal communication skills; self-starter with outcome focus.

Preferred (nice-to-have):

• Experience with latest AMD SOC/FPGAs and AMD FPGA NOC/advanced features (partial reconfiguration, DFX, segmented flow).
• Working knowledge of signal processing chains (data converters to bits) and wireless/radar system exposure.
• Experience with RF test equipment (spectrum analyzer, signal generators, oscilloscopes).
• Familiarity with AMD AIE tiles for processing.

Education Requirements

Not specified.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.