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Senior FPGA Engineer, Cyber

Anduril
August 19, 2026
Full-time
On-site
Washington, District of Columbia, United States
RTL Design Jobs, Level - Senior

Job Title

Senior FPGA Engineer, Cyber

Role Summary

Join Anduril's Cyber team to design and deliver high-throughput FPGA/SoC implementations that enable mission-focused cyber capabilities at the edge. The role requires hands-on RTL design, verification, timing closure, and hardware/software integration to turn algorithms and interfaces into reliable fielded designs.

Experience Level

Senior engineer. Specific years of experience not stated.

Responsibilities

Primary responsibilities focus on FPGA architecture, implementation, verification, and lab bring-up for high-speed, timing-sensitive systems.

  • Design and implement high-throughput FPGA datapaths, packetization pipelines, and hardware-near acceleration blocks.
  • Own RTL design, simulation, verification, and lab bring-up using VHDL, Verilog, or SystemVerilog workflows.
  • Collaborate with DSP, software, hardware, and systems engineers to map algorithms and interfaces to FPGA implementations.
  • Drive precision timing, synchronization, sysref/clocking, and throughput closure for FPGA/SoC platforms and adjacent high-speed interfaces.
  • Document architectures, interfaces, and verification approaches for cross-functional integration and maintainability.
  • Support design reviews, technical trade studies, and hands-on lab debugging.

Requirements

Must-have technical skills and practical experience for immediate contribution; preferred items improve fit but are not required.

  • Must-have: Strong FPGA development experience on Xilinx or comparable platforms, including SoC/MPSoC or high-performance devices relevant to SDR systems.
  • Proficiency in VHDL, Verilog, or SystemVerilog, including simulation, timing closure, and resource/performance tradeoffs.
  • Experience building high-speed digital interfaces and datapaths (Ethernet packet movement, DMA-adjacent flows, streaming signal pipelines).
  • Hands-on familiarity with precision timing, synchronization, sysref/clocking concepts, and deterministic interface behavior.
  • Experience with FPGA verification methodologies and automation, including regression testbenches and CI-backed validation.
  • Practical lab debugging skills with oscilloscopes, logic analyzers, spectrum analyzers, or similar instrumentation.
  • Ability to collaborate effectively with software and DSP engineers on register interfaces and integration boundaries; strong written and verbal communication.
  • Nice-to-have: Experience with cocotb, GitLab CI/CD, FFT/channelization pipelines, PSD/AGC-related blocks, Linux-based control planes, customer-facing design reviews, or mentoring other engineers.

Education Requirements

Not specified.


About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.

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Date Posted: 2026-08-19