Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Senior FPGA Engineer to join a seed-stage startup building distributed RF sensing systems. The role supports development of real-time processing and communications subsystems for an early system demonstration.

Position is a direct-hire placement based in San Francisco / San Jose area and reports into the engineering team working on RF, communications, and real-time processing integration.

Experience Level

Senior-level. The posting does not state specific years of experience.

Responsibilities

Core responsibilities are not exhaustively listed in the source. Typical responsibilities for this role are:

• Design, implement, and verify FPGA firmware for real-time signal processing and communications tasks.
• Integrate FPGA logic with RF front-ends, ADC/DACs, and embedded processors.
• Develop and maintain testbenches, simulation flows, and hardware bring-up procedures.
• Optimize designs for timing, resource utilization, and power on target devices.
• Collaborate with system, RF, and software engineers to support prototype demonstrations.

Requirements

The source does not provide a formal requirements list. Likely must-have and nice-to-have items are summarized below.

• Must-have: Practical experience developing FPGA designs using HDLs (VHDL/Verilog/SystemVerilog) and common toolchains (e.g., Xilinx Vivado, Intel Quartus).
• Must-have: Experience with real-time digital signal processing and hardware/software integration for embedded systems.
• Must-have: Experience with hardware bring-up, debugging on boards, and using logic analyzers/JTAG.
• Nice-to-have: Prior work with RF or communications systems, experience with ADC/DAC interfaces, or multi-channel high-speed I/O.
• Nice-to-have: Familiarity with C/C++ or Python for test automation and host-side integration.

Education Requirements

Not specified.

About the Company

Company: FINITETEK

Semiconductor design company specializing in analog/mixed-signal integrated circuits, with an emphasis on power management ICs (PMICs) and related chip architecture, verification, and silicon bring-up.