Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Engineer on a multidisciplinary Electronic Systems Development team developing FPGA- and ASIC-based prototype systems for government R&D projects. Work focuses on rapid prototyping and implementation of embedded sensor, communication, and navigation systems on state-of-the-art platforms.

Experience Level

Senior-level. Typical experience guidance: traditionally filled by candidates who meet the stated experience/degree combinations (see Education Requirements) and who can independently lead complex FPGA/embedded design work.

Responsibilities

Primary responsibilities include design, implementation, and integration of FPGA/ASIC components and embedded systems.

• Develop RTL for FPGA/ASIC components and integrate third-party IP into designs.
• Implement algorithms in hardware and software on embedded platforms (SoC/MPSoC/RFSoC/Versal/Agilex-class devices).
• Perform RTL synthesis, simulation, verification, and timing closure activities.
• Support system-level prototyping, board bring-up, and integration with SDR and sensor systems.
• Apply best practices for design, verification, test, documentation, and version control.
• Collaborate with cross-disciplinary teams and communicate technical results in writing and orally.

Requirements

Must-have technical skills, security, and workplace requirements. Education and degree/years guidance are captured separately under Education Requirements.

• Proven experience with RTL languages (VHDL, Verilog, SystemVerilog) and RTL synthesis & simulation tools.
• Experience implementing complex embedded systems and integrating third-party IP.
• Familiarity with verification, test, and deployment workflows for digital designs.
• Strong programming foundation and experience with scripting/build tools (examples: Python, TCL, CMake).
• Excellent oral and written communication skills.
• U.S. Citizenship required (per government eligibility) and ability to obtain and maintain a DoD Secret clearance.
• Position requires a minimum of four days per week on-site at the Bedford, MA location.
• Nice-to-have: experience with AMD Xilinx MPSoC/RFSoC/Versal or Intel Agilex SoC; exposure to ASIC EDA flows (synthesis, place & route, timing closure); knowledge of processor interfaces, MATLAB, UVM/OVM, hardware emulation platforms (Cadence Palladium, Siemens Veloce); familiarity with foundry/process-node considerations.

Education Requirements

Typical qualification combinations: Bachelor's degree plus ~5 years related experience; Master's degree plus ~3 years related experience; PhD with relevant experience; or an equivalent combination of education and related work experience. Preferred fields: Electrical Engineering, Computer Engineering, Computer Science, or similar technical fields. (M.S. or Ph.D. in EE/CE or similar is listed as preferred.)

About the Company

Company: MITRE

Headquarters: Bedford, Massachusetts, United States

MITRE is a not-for-profit organization dedicated to solving national challenges in defense, cybersecurity, healthcare, aviation, and more. By partnering with the government, MITRE operates R&D centers that develop innovative solutions for public interest. Known for its culture of innovation, it offers exceptional employee benefits, professional growth opportunities, and diversity initiatives to ensure a fulfilling workplace for its staff.