Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Lead RTL design and FPGA development for a spaceborne radar payload, focusing on control and signal-processing firmware for mission-critical operation. Work on architecture, implementation, integration, and verification of FPGA-based systems in a multi-disciplinary engineering team.

Collaborate with radar algorithm, hardware, software, and mechanical engineers to deliver reliable embedded firmware for radar sensor operation and on-orbit/airborne deployment.

Experience Level

Senior — typically 8+ years of relevant embedded firmware or FPGA/RTL experience.

Responsibilities

Key responsibilities include:

• Architect, design, and implement RTL and firmware for radar sensor control and signal processing.
• Integrate RTL onto FPGA/SoC platforms; perform synthesis, place-and-route, and timing closure.
• Lead bring-up, verification, and validation of FPGA designs on prototype and flight hardware.
• Evaluate resource, complexity, and maintenance trade-offs (logic cells, memory, DSP slices) and produce trade studies to guide design decisions.
• Collaborate with algorithm, hardware, software, and mechanical teams to define firmware requirements and interfaces.
• Implement and debug peripheral interfaces and board-level integrations during bring-up.
• Contribute to hiring and mentoring of additional FPGA/firmware engineers.

Requirements

Must-have technical skills and eligibility:

• 8+ years of embedded firmware and RTL development experience, ideally with radar or other signal-processing systems.
• Proven RTL design experience using Verilog or VHDL and ability to read schematic diagrams.
• Experience with bring-up and verification of RTL-based designs on target hardware.
• Familiarity with low-speed interfaces: I2C, SPI, UART, RS422, and common peripheral protocols.
• Comfortable with Git, CI workflows, code reviews, and version control in a lean engineering environment.
• Ability to perform synthesis, place-and-route, timing analysis, and timing closure including CDC considerations.
• Eligible to obtain and maintain a U.S. Top Secret/SCI security clearance; U.S. citizenship or lawful permanent residency/refugee/asylee status required for ITAR-covered work.

Nice-to-have:

• Experience designing distributed digital systems and multi-FPGA embedded architectures.
• Background in satellite, airborne, or other harsh-environment digital implementations.
• Experience with AMD Ultrascale, Intel Arria10, Lattice Avant, Microchip PolarFire or similar platforms.
• Experience with high-speed ADC/DAC interfaces (JESD204) and low-latency data movement between FPGAs, processors, and networking/storage interfaces.
• Working knowledge of networking stacks (Ethernet, TCP/IP) and real-time signal-processing implementations in RTL.
• Previous or active U.S. Government TS/SCI clearance is a strong plus.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a related technical field; or equivalent practical experience in embedded firmware/FPGA/RTL development.

About the Company

Company: Kapta Space

Headquarters: Seattle, WA, United States

VC-funded early-stage startup based in Seattle developing electronically-steered radar systems for spaceborne geospatial intelligence and advanced defense applications (e.g., synthetic aperture radar, target tracking).