Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Technical lead for FPGA development on airborne radar products within the Battlespace Awareness team. Responsible for translating signal-processing algorithms into FPGA implementations, defining FPGA architecture and verification approaches, and maturing prototypes into production-ready designs.

Work closely with interdisciplinary hardware, firmware, and software teams to deliver real-time radar processing on Altera/Intel FPGA platforms.

Experience Level

Senior - 8+ years of professional FPGA design and development experience.

Responsibilities

Primary responsibilities include leading FPGA architecture and implementation for airborne radar systems and establishing robust FPGA design and verification practices.

• Lead FPGA architecture, RTL design, and verification from concept through production.
• Translate signal-processing algorithms into efficient, high-performance FPGA implementations on Altera/Intel SOC/FPGA platforms.
• Design and implement DSP chains for data acquisition, filtering, and real-time processing.
• Perform timing analysis, resource optimization, and debug complex FPGA designs.
• Establish coding standards, verification methodologies, and design processes for the team.
• Produce and maintain architecture specifications, design reviews, and verification plans.
• Collaborate across sites to ensure design consistency and transfer knowledge.
• Mentor and guide other engineers as the team scales.

Requirements

Must-have technical skills and qualifications.

• 8+ years of professional FPGA design and development experience.
• Strong expertise in RTL design using SystemVerilog and/or VHDL.
• Demonstrated experience implementing digital signal processing on FPGAs.
• Experience with Altera/Intel FPGA devices and development tools (Quartus); familiarity with Xilinx toolchains (Vivado) is beneficial.
• Experience with FPGA verification methodologies and simulation tools.
• Strong understanding of timing closure, resource optimization, and FPGA design constraints.
• Experience with high-speed interfaces and platform integration (e.g., PCIe, Ethernet, JESD204B) - preferred.
• Self-directed technical leadership with ability to drive projects from requirements to hardware implementation.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Education Requirements

Bachelor's degree in electrical engineering, electronics engineering, computer engineering, or a related field (specified as a requirement in the posting).

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.