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Senior FPGA Engineer

Grammar
June 12, 2026
Full-time
On-site
Tucson, Arizona, United States
FPGA Programming Jobs, Level - Senior

Job Title

Senior FPGA Engineer

Role Summary

Design, implement, and verify FPGA-based solutions using VHDL across major vendors (Xilinx, Altera, Microsemi). Work with systems and circuit-card engineers to define requirements, architect FPGA designs, model algorithms, develop code, simulate, and run place-and-route flows.

Support designs through integration and test, debugging hardware/software interfaces and ensuring implementations meet system-level requirements.

Experience Level

Senior β€” minimum 5 years of relevant FPGA/digital design experience.

Responsibilities

Primary responsibilities include design, verification, and system-level support for FPGA projects.

  • Develop and verify FPGA designs using VHDL for Xilinx, Altera, and Microsemi devices.
  • Implement designs for gigabit serial interfaces, RF/EO DSP, controls, data links, and embedded processor interfaces.
  • Collaborate with circuit card designers and systems engineers to develop requirements and architectures.
  • Model algorithms, write HDL code, perform simulation, and run place-and-route flows.
  • Integrate and debug FPGA designs in hardware and support system-level testing and verification.
  • Verify designs against requirements and provide engineering support from requirements through integration and test.

Requirements

Must-have skills and experience, plus optional desirable experience.

  • Must-have: Minimum 5 years of FPGA/digital design experience.
  • Must-have: Hands-on VHDL coding and digital design experience.
  • Must-have: Experience with Xilinx or Microsemi devices and vendor flow tools.
  • Must-have: Experience delivering FPGA solutions to system-level applications and performing integration/debug.
  • Nice-to-have: Radar or image (visual/IR) processing techniques.
  • Nice-to-have: Embedded systems design experience with ARM, MicroBlaze, or Nios processors.
  • Nice-to-have: Experience with gigabit serial interfaces and multi-gigabit transceivers (MGTs).
  • Nice-to-have: Constrained-random verification (UVM/SystemVerilog) and experience with emulation platforms (e.g., Veloce).

Education Requirements

Not specified.


About the Company

Company: Grammar

Engineering firm focused on FPGA/ASIC verification and embedded firmware for secure tactical radio communication systems used by military and first responders.

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Date Posted: 2026-06-12