Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Technical lead for FPGA development on the Battlespace Awareness radar team, responsible for airborne radar FPGA architecture, RTL implementation, verification, and handoff to production. Work spans FPGA firmware, digital signal processing, and integration with cross-site engineering teams.

Deliver high-performance FPGA implementations from algorithm specification through verified hardware designs and establish FPGA design processes and standards for the team.

Experience Level

Senior-level. The role expects approximately 12+ years of professional FPGA design and development experience.

Responsibilities

Primary responsibilities include designing, implementing, and verifying FPGA-based signal processing for airborne radar systems and establishing team best practices.

• Lead FPGA architecture, design, and verification from concept through production for airborne radar systems.
• Translate signal-processing algorithms into efficient, high-performance FPGA implementations.
• Design and implement DSP chains including data acquisition, filtering, and real-time processing.
• Perform timing analysis, resource optimization, and debug complex FPGA designs.
• Establish and enforce FPGA coding standards, verification methodologies, and design processes.
• Produce and maintain design documentation, architecture specs, and verification plans.
• Collaborate with cross-site engineering teams to ensure integration and knowledge transfer.
• Mentor and guide other engineers as the team scales FPGA capabilities.

Requirements

Must-have technical skills, security eligibility, and hands-on FPGA experience. Preferred items listed separately.

• 12+ years of professional FPGA design and development experience.
• Strong RTL design skills in SystemVerilog and/or VHDL.
• Experience with Altera/Intel FPGA families and toolchains (Quartus); familiarity with Xilinx toolchains is a plus.
• Proven experience implementing digital signal processing on FPGAs.
• Experience with FPGA verification methodologies and simulation tools.
• Strong understanding of timing closure, resource optimization, and FPGA design constraints.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Nice-to-have:

• Experience with radar systems or software-defined radio development.
• Familiarity with high-speed interfaces (PCIe, Ethernet, JESD204B).
• Experience with Xilinx Zynq UltraScale+, Intel AgileX, or RFSoC platforms.
• Embedded software development experience for FPGA SoC platforms and MATLAB-based algorithm-to-hardware workflows.
• Knowledge of RF front-end design and DO-254 or similar airborne hardware standards.
• Experience with version control (Git) and continuous integration workflows; background in aerospace or defense systems.

Education Requirements

Bachelor's degree in electrical engineering, electronics engineering, computer engineering, or a related technical field.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.