Senior FPGA Engineer

Job Title

Senior FPGA Engineer

Role Summary

Technical lead for FPGA development on airborne radar products within the Battlespace Awareness radar team in Fort Collins, CO. Drive FPGA architecture, translate signal-processing algorithms into hardware, and establish FPGA design and verification processes for production systems.

Work closely with interdisciplinary teams across sites to design, prototype, test, and mature radar FPGA implementations. US salary range: $191,000—$253,000 USD.

Experience Level

Senior — 12+ years of professional FPGA design and development experience is required.

Responsibilities

Primary responsibilities for FPGA architecture, implementation, verification, and team technical leadership.

• Lead FPGA architecture, design, and verification for airborne radar systems from concept through production.
• Translate signal processing algorithms into efficient, high-performance RTL implementations on Xilinx SoC/FPGA platforms.
• Design and implement digital signal processing chains including data acquisition, filtering, and real-time processing.
• Perform timing analysis, resource optimization, and debugging of complex FPGA designs to meet performance and timing goals.
• Establish and drive FPGA coding standards, verification methodologies, and design processes for the team.
• Develop and maintain architecture specifications, design reviews, and verification plans.
• Mentor and guide engineers as the team scales FPGA capabilities and coordinate knowledge transfer across sites.

Requirements

Core technical and security requirements; candidates should meet the must-have items below.

• 12+ years of professional FPGA design and development experience.
• Strong RTL design expertise in SystemVerilog and/or VHDL.
• Hands-on experience with Xilinx FPGA devices and development tools (e.g., Vivado).
• Proven experience implementing digital signal processing on FPGAs.
• Experience with FPGA verification methodologies and simulation tools.
• Deep understanding of timing closure, resource optimization, and FPGA design constraints.
• Self-directed technical leadership with ability to drive projects from requirements to implementation.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Nice-to-have: experience with radar systems or software-defined radio, high-speed interfaces (PCIe, Ethernet, JESD204B), Xilinx Zynq UltraScale+/RFSoC or Altera AgileX platforms, MATLAB and algorithm-to-hardware workflows, embedded software for SoC platforms, DO-254 familiarity, aerospace/defense background, version control and CI workflows.

Education Requirements

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.