Senior Engineer, RTL Design

Job Title

Senior Engineer, RTL Design

Role Summary

Join the Memory Solutions Lab (MSL) within Samsung's Memory Business Unit to design and validate RTL IP and FPGA prototypes for datacenter and cloud memory, storage, networking, and compute solutions. The role focuses on microarchitecture, RTL implementation, lab bring-up, and system-level validation to support product and proof-of-concept development.

Location: daily onsite presence at the San Jose, CA office.

Experience Level

Senior level. The posting specifies degree-and-experience combinations (see Education Requirements) and expects several years of RTL development and system integration experience.

Responsibilities

Key responsibilities include developing RTL IP, validating prototypes, and collaborating across hardware and software teams.

• Define microarchitecture and implement RTL (Verilog) for high-performance IP.
• Develop and maintain verification environments and testbenches; perform simulation and debug.
• Perform synthesis, timing analysis, partitioning and FPGA implementation for prototypes.
• Lab bring-up, board-level testing, system integration, and validation of RTL IPs and FPGA prototypes.
• Work with hardware and software architects on feasibility studies and prototype development.
• Assist software engineers with device driver integration and system-level debugging.
• Research and evaluate emerging standards and features relevant to memory, storage, and interconnects; contribute to publications or patents where applicable.

Requirements

Must-have technical skills and professional competencies.

• Extensive HDL experience, particularly Verilog RTL design, integration, and debug.
• Proven experience with synthesis, timing closure, simulation, and testbench creation using industry CAD tools (Synopsys, Mentor, Cadence).
• Hands-on FPGA design flow knowledge, including partitioning, implementation, and programming.
• Practical board bring-up and server system integration experience; ability to run lab validation and debug hardware/software interactions.
• Familiarity with protocols and interfaces such as PCIe, CXL, NVMe, AXI, DDR4/DDR5, and Ethernet.
• Strong verbal and written communication, attention to detail, and ability to meet aggressive deadlines in cross-functional teams.

Nice-to-have:

• Experience developing Linux/Windows device drivers or close collaboration with driver teams.
• Background in memory hierarchy, storage, networking, or embedded computing applied to datacenter solutions.
• Prior work on publications, patents, or prototype demonstrations for advanced memory or interconnect features.

Education Requirements

BS with 5 years of RTL development experience, MS with 3 years of RTL development experience, or Ph.D. in Computer Engineering or Electrical Engineering.

About the Company

Company: Samsung Semiconductor

Headquarters: San Diego, California, United States

Samsung Semiconductor is a global leader in semiconductor technology, providing innovative solutions for diverse applications including smartphones, electric vehicles, and data centers. As part of Samsung's Advanced Institute of Technology, the company focuses on cutting-edge research in areas such as CPU microarchitecture, AI, and HPC, fostering a diverse and inclusive work environment for its employees to thrive and innovate.