Senior Engineer: Post Silicon - Bring Up

Job Title

Senior Engineer — Post Silicon Bring-Up

Role Summary

Responsible for post-silicon bring-up and performance optimization of Cerebras' Wafer Scale Engine (WSE). The role delivers end-to-end solutions by collaborating with chip design, system performance, software, verification and product teams to enable robust silicon for real-world AI workloads.

Experience Level

Senior level. The posting requests approximately 7–10+ years of industry experience with 3–5 years working on pre-silicon and post-silicon ASIC hardware.

Responsibilities

Key duties include bringing up WSE silicon, building infrastructure for testing at scale, and working across hardware and software domains to improve performance and reliability.

• Develop and debug production-ready bring-up flows for Wafer Scale Engines to reduce time and cost.
• Refine system-level tradeoffs across di/dt, V‑F characterization, current and temperature limits to optimize performance.
• Build and enhance infrastructure for silicon validation with real-world workloads and large-scale automation.
• Create self-checking metrics, instrumentation for debug, and coverage metrics for silicon validation.
• Collaborate with architects, designers, performance and software engineers to improve WSE performance.
• Work across software, design, verification, emulation and validation teams to close cross-domain issues.
• Integrate with CI/CD tools, git repositories, GitHub workflows, and Jenkins to streamline test, merge and release flows.

Requirements

Must-have skills and experience.

• 7–10+ years industry experience; 3–5 years specifically in pre-silicon and post-silicon ASIC hardware.
• Strong programming ability in Python and proficiency with Verilog/SystemVerilog and C.
• Good understanding of computer architecture and networking.
• Experience in hardware/software co-design and layered architectures.
• Strong debugging, analytical and problem-solving skills.
• Experience with large-scale testing and automation (pytest, Python) and instrumentation for diagnostics.
• Familiarity with CI/CD, git, GitHub, GitHub Actions/Jenkins and release workflows.
• Effective communication and cross-functional collaboration skills.

Nice-to-have:

• Previous work on AI/ML systems with many-core CPU and fabric-based communication designs.
• Experience with in-line testing, CPU memory/execution diagnostics, and self-checking tests.
• Knowledge of chip defect profiles and mitigation strategies spanning hardware and software.
• Experience building test and software infrastructure at large scale and operating across global time zones.

Education Requirements

BS/BE/B.Tech or MS/M.Tech in Electrical Engineering, ECE, Computer Science or related field, or equivalent practical work experience.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.