Senior Engineer, Physical Verification Engineering

Job Title

Senior Engineer, Physical Verification Engineering

Role Summary

Lead physical verification (PV) signoff for block and full-chip designs, and own EM/IR analysis and power-integrity verification. Work with layout, circuit, package and CAD/EDA teams to achieve tapeout-ready signoff while improving PV and EMIR methodology and automation.

Position is based in Bangalore (on-site), first shift; travel required ~10%.

Experience Level

Senior / Experienced. No specific years-of-experience stated in the posting.

Responsibilities

Key responsibilities include ensuring signoff quality and improving verification flows.

• Own and drive block-level and full-chip PV signoff activities and documentation for tapeout readiness.
• Perform and debug DRC, LVS, parasitic extraction (PEX), PERC/ERC, antenna, density and DFM checks.
• Perform EM and IR drop analysis and define power integrity strategies for blocks and full-chip designs.
• Analyze and resolve complex PV, EM and IR violations, and recommend design or layout corrective actions.
• Review and implement foundry rule deck updates and maintain signoff rule compliance.
• Develop methodologies, automation, dashboards and reporting to improve PV/EMIR productivity and turnaround time.
• Collaborate with physical design, layout, circuit, package and CAD/EDA teams; participate in design and signoff reviews.
• Mentor junior engineers and provide technical guidance during signoff and tapeout planning.

Requirements

Required technical skills and expectations.

• Must-have: Proven experience with PV signoff flows including DRC, LVS and parasitic extraction (PEX).
• Must-have: Experience performing EM and IR drop analysis and defining power-integrity verification strategies.
• Must-have: Ability to analyze and debug complex PV/EM/IR violations and coordinate corrective actions with designers/layout teams.
• Must-have: Scripting and automation experience using Python, Tcl, Shell, or SKILL to develop PV/EMIR flows and utilities.
• Must-have: Experience working with foundry rule decks and preparing signoff documentation for tapeout.
• Nice-to-have: Experience with digital, analog and mixed-signal designs and correlation of simulation results with reliability/spec requirements.
• Nice-to-have: Experience building dashboards and reporting mechanisms for signoff metrics and tracking closure.

Education Requirements

Not specified.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.