Senior Engineer, IP Verification (AMS Verification)

Job Title

Senior Engineer, IP Verification (AMS Verification)

Role Summary

Senior verification engineer responsible for analog/mixed-signal (AMS) IP verification with an emphasis on building SPICE testbenches, mixed-signal co-simulation environments, and verification infrastructure. Works on DRAM-related IP inside a verification team to ensure functional and behavioral correctness of analog, digital, and mixed-signal blocks.

Experience Level

Senior level. The posting specifies experience guidance: typically 4–6 years with a Bachelor's degree or 2–4 years with a postgraduate degree in electronics or a related engineering field.

Responsibilities

Primary responsibilities include planning and executing verification for AMS IP, creating verification environments, and debugging complex designs.

• Plan and execute analog, digital, and mixed-signal IP verification activities at block and full-chip levels.
• Design and build SPICE testbenches and mixed-signal co-simulation (COSIM) environments.
• Write and maintain Verilog, Verilog-A/AMS, and RVM models for verification.
• Develop and run SV/UVM testbenches and use SV/PSL assertions for coverage and checking.
• Debug complex analog/digital/mixed-signal interactions and resolve circuit-level issues.
• Integrate and use EDA tools (Virtuoso, HSPICE, PrimeSim/FinSim, Xcelium, Simvision, WaveView) in verification flows.
• Improve verification methodology, automation, and scripting to increase productivity.
• Adopt approved AI tools where appropriate to support verification workflows, while retaining responsibility for technical decisions.
• Collaborate with circuit designers, layout, and system teams; communicate findings and verification status to stakeholders.

Requirements

Required technical skills and experience for the role; education requirements are summarized separately below.

• Strong understanding of analog and mixed-signal circuits and verification concepts.
• Hands-on experience debugging complex analog, digital, and mixed-signal circuits.
• Experience building SPICE testbenches at block and full-chip level and creating COSIM/mixed-signal verification environments.
• Experience with Verilog models and Verilog-A/AMS; experience writing RVM models.
• Hands-on experience with SystemVerilog and UVM-based verification methodologies; experience with assertions (SV/PSL).
• Familiarity with EDA tools such as Virtuoso, PrimeSim/FinSim, HSPICE, Xcelium, Simvision, WaveView.
• Previous work experience in DRAM or memory-related IP and related verification projects.
• Strong debugging, communication, and teamwork skills.
• Willingness to proactively explore and apply approved AI tools to verification and scripting tasks.
• Preferred: scripting experience (Perl, Python) to automate verification tasks and data analysis.

Education Requirements

Either a Bachelor’s degree in Electronics Engineering (or related engineering field) with ~4–6 years of experience, or a Postgraduate degree in Electronics Engineering (or related) with ~2–4 years of experience, as stated in the posting.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.